SSN1N45B
SSN1N45B
450V N-Channel MOSFET
General Description
Features
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary,
planar, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the
avalanche and commutation mode. These devices are well
suited for electronic ballasts based on half bridge
configuration.
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0.5A, 450V, RDS(on) = 4.25Ω @VGS = 10 V
Low gate charge ( typical 6.5 nC)
Low Crss ( typical 6.5 pF)
100% avalanche tested
Improved dv/dt capability
Gate-Source Voltage ± 50V guaranteed
D
!
●
◀
G!
TO-92
Absolute Maximum Ratings
Symbol
VDSS
ID
!
S
SSN Series
GDS
TC = 25°C unless otherwise noted
Parameter
Drain-Source Voltage
- Continuous (TC = 25°C)
Drain Current
SSN1N45B
450
Drain Current
- Pulsed
Units
V
0.5
- Continuous (TC = 100°C)
IDM
▲
●
●
A
0.32
A
4.0
(Note 1)
A
± 50
V
108
mJ
VGSS
Gate-Source Voltage
EAS
Single Pulsed Avalanche Energy
(Note 2)
IAR
Avalanche Current
(Note 1)
0.5
A
EAR
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Power Dissipation (TA = 25°C)
(Note 1)
0.25
5.5
0.9
mJ
V/ns
W
2.5
0.02
-55 to +150
W
W/°C
°C
300
°C
dv/dt
PD
(Note 3)
Power Dissipation (TL = 25°C)
TJ, Tstg
TL
- Derate above 25°C
Operating and Storage Temperature Range
Maximum lead temperature for soldering purposes,
1/8" from case for 5 seconds
Thermal Characteristics
Symbol
RθJL
Parameter
Thermal Resistance, Junction-to-Lead
(Note 6a)
Typ
--
Max
50
Units
°C/W
RθJA
Thermal Resistance, Junction-to-Ambient
(Note 6b)
--
140
°C/W
©2002 Fairchild Semiconductor Corporation
Rev. A, November 2002