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BS62LV1029SIP-70

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仕様・特性

BSI Very Low Power/Voltage CMOS SRAM 128K X 8 bit BS62LV1029 DESCRIPTION FEATURES • Vcc operation voltage : 4.5V ~ 5.5V • Very low power consumption : Vcc = 5.0V C-grade : 46mA (@55ns) operating current I- grade : 47mA (@55ns) operating current C-grade : 38mA (@70ns) operating current I- grade : 39mA (@70ns) operating current 0.6uA (Typ.) CMOS standby current • High speed access time : -55 55ns -70 70ns • Automatic power down when chip is deselected • Three state outputs and TTL compatible • Fully static operation • Data retention supply voltage as low as 1.5V • Easy expansion with CE2, CE1, and OE options The BS62LV1029 is a high performance, very low power CMOS Static Random Access Memory organized as 131,072 words by 8 bits and operates from a range of 4.5V to 5.5V supply voltage. Advanced CMOS technology and circuit techniques provide both high speed and low power features with a typical CMOS standby current of 0.6uA at 5V/25oC and maximum access time of 55ns at 5V/85oC. Easy memory expansion is provided by an active LOW chip enable (CE1), an active HIGH chip enable (CE2), and active LOW output enable (OE) and three-state output drivers. The BS62LV1029 has an automatic power down feature, reducing the power consumption significantly when chip is deselected. The BS62LV1029 is available in DICE form , JEDEC standard 32 pin 450mil Plastic SOP, 300mil Plastic SOJ, 600mil Plastic DIP, 8mmx13.4 mm STSOP and 8mmx20mm TSOP. PRODUCT FAMILY PRODUCT FAMILY OPERATING TEMPERATURE BS62LV1029SC BS62LV1029TC BS62LV1029STC BS62LV1029PC BS62LV1029JC BS62LV1029DC BS62LV1029SI BS62LV1029TI BS62LV1029STI BS62LV1029PI BS62LV1029JI BS62LV1029DI Vcc RANGE Vcc=5.0V PKG TYPE (ICC, Max) Vcc= 5.0V 55ns 70ns 4.5V ~ 5.5V 55/70 8.0uA 46mA 38mA O O 4.5V~ 5.5V 55/70 20uA 47mA 39mA -40 C to +85 C 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 • 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 (ICCSB1 , Max) O 32 31 30 29 28 27 BS62LV1029SC 26 BS62LV1029SI 25 BS62LV1029PC 24 BS62LV1029PI 23 BS62LV1029JC 22 BS62LV1029JI 21 20 19 18 17 • A11 A9 A8 A13 WE CE2 A15 VCC NC A16 A14 A12 A7 A6 A5 A4 55ns :4.5~5.5V 70ns :4.5~5.5V O +0 C to +70 C BS62LV1029TC BS62LV1029STC BS62LV1029TI BS62LV1029STI SOP-32 TSOP-32 STSOP-32 PDIP-32 SOJ-32 DICE SOP-32 TSOP-32 STSOP-32 PDIP-32 SOJ-32 DICE BLOCK DIAGRAM PIN CONFIGURATIONS NC A16 A14 A12 A7 A6 A5 A4 A3 A2 A1 A0 DQ0 DQ1 DQ2 GND POWER DISSIPATION STANDBY Operating SPEED (ns) VCC A15 CE2 WE A13 A8 A9 A11 OE A10 CE1 DQ7 DQ6 DQ5 DQ4 DQ3 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 A6 A7 A12 A14 A16 A15 A13 A8 A9 A11 Address Input Buffer 20 Row 1024 Memory Array 1024 x 1024 Decoder 1024 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 OE A10 CE1 DQ7 DQ6 DQ5 DQ4 DQ3 GND DQ2 DQ1 DQ0 A0 A1 A2 A3 CE2 CE1 WE OE Vdd Gnd 8 8 Data Input Buffer Data Output Buffer Column I/O 8 8 Write Driver Sense Amp 128 Column Decoder 14 Control Address Input Buffer A5 A4 A3 A2 A1 A0 A10 Brilliance Semiconductor, Inc. reserves the right to modify document contents without notice. R0201-BS62LV1029 1 Revision 1.1 Jan. 2004

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