THC63LVDM83C _Rev2.0
THC63LVDM83C
REDUCED SWING LVDS 24Bit COLOR HOST-LCD PANEL INTERFACE
General Description
Features
The THC63LVDM83C transmitter is designed to support pixel data transmission between Host and Flat
Panel Display from NTSC up to SXGA+ resolutions.
The THC63LVDM83C converts 28bits of CMOS/TTL
data into LVDS(Low Voltage Differential Signaling)
data stream. The transmitter can be programmed for rising edge or falling edge clocks through a dedicated pin.
At a transmit clock frequency of 135MHz, 24bits of
RGB data and 4bits of timing and control data
(HSYNC, VSYNC, CNTL1, CNTL2) are transmitted at
an effective rate of 945Mbps per LVDS channel.
• Wide dot clock range: 8-135MHz suited for NTSC,
VGA, SVGA, XGA,SXGA and SXGA+
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PLL requires no external components
Supports spread spectrum clock generator
On chip jitter filtering
Clock edge selectable
Supports reduced swing LVDS for low EMI
Power down mode
Low power single 3.3V CMOS design
Low profile 56 Lead TSSOP Package
Backward compatible with
THC63LVDM83R(24bits)
Block Diagram
TA0-6
TB0-6
TC0-6
TD0-6
7
7
7
7
TTL PARALLEL TO SERIAL
THC63LVDM83C
CMOS/TTL
INPUTS
DATA
(LVDS)
TA +/TB +/TC +/TD +/(56-945Mbit/On Each
LVDS Channel)
TRANSMITTER
CLKIN
(8 to 135MHz)
TCLK +/-
PLL
CLOCK
(LVDS)
8-135MHz
R/F
/PDWN
RS
Copyright 2002-2003 THine Electronics, Inc. All rights reserved
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THine Electronics, Inc.
