MC10114
Triple Line Receiver
The MC10114 is a triple line receiver designed for use in sensing
differential signals over long lines. An active current source and
translated emitter follower inputs provide the line receiver with a
common mode noise rejection limit of one volt in either the positive or
the negative direction. This allows a large amount of common mode
noise immunity for extra long lines.
Another feature of the MC10114 is that the OR outputs go to a logic
low level whenever the inputs are left floating. The outputs are each
capable of driving 50 ohm transmission lines.
This device is useful in high speed central processors,
minicomputers, peripheral controllers, digital communication
systems, testing and instrumen– tation systems. The MC10114 can
also be used for MOS to MECL interfacing and it is ideal as a sense
amplifier for MOS RAM’s.
A VBB reference is provided which is useful in making the
MC10114 a Schmit trigger, allowing single–ended driving of the
inputs, or other applications where a stable reference voltage is
necessary. See MECL Design Handbook (HB205) pages 226 and 228.
• PD = 145 mW typ/pkg
• tpd = 2.4 ns typ (Single Ended Input)
• tpd = 2.0 ns typ (Differential Input)
• tr, tf = 2.1 ns typ (20%–80%)
http://onsemi.com
MARKING
DIAGRAMS
16
CDIP–16
L SUFFIX
CASE 620
MC10114L
AWLYYWW
1
16
PDIP–16
P SUFFIX
CASE 648
MC10114P
AWLYYWW
1
1
PLCC–20
FN SUFFIX
CASE 775
10114
AWLYYWW
LOGIC DIAGRAM
4
2
5
3
9
6
10
7
12
14
13
15
11
A
WL
YY
WW
VBB*
VCC1 = PIN 1
VCC2 = PIN 16
VEE = PIN 8
= Assembly Location
= Wafer Lot
= Year
= Work Week
ORDERING INFORMATION
Device
Package
Shipping
*VBB to be used to supply bias to the MC10114 only and bypassed (when used) with
0.01 µF to 0.1 µF capacitor to ground (0 V). VBB can source < 1.0 mA.
MC10114L
CDIP–16
25 Units / Rail
When the input pin with the bubble goes positive, its respective output pin with
bubble goes positive.
MC10114P
PDIP–16
25 Units / Rail
MC10114FN
PLCC–20
46 Units / Rail
DIP PIN ASSIGNMENT
VCC1
1
16
VCC2
AOUT
2
15
COUT
AOUT
3
14
COUT
AIN
4
13
CIN
AIN
5
12
CIN
BOUT
6
11
VBB
BOUT
7
10
BIN
VEE
8
9
BIN
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion Tables on page 18
of the ON Semiconductor MECL Data Book (DL122/D).
© Semiconductor Components Industries, LLC, 2002
January, 2002 – Rev. 7
1
Publication Order Number:
MC10114/D
