HD74LS125A
Quadruple Bus Buffer Gates (with three-state outputs)
REJ03D0430–0200
Rev.2.00
Feb.18.2005
Features
• Ordering Information
Part Name
Package Type
Package Code
(Previous Code)
Package
Abbreviation
Taping Abbreviation
(Quantity)
HD74LS125AP
DILP-14 pin
PRDP0014AB-B
(DP-14AV)
P
—
HD74LS125AFPEL
SOP-14 pin (JEITA)
PRSP0014DF-B
(FP-14DAV)
FP
EL (2,000 pcs/reel)
PRSP0014DE-A
RP
(FP-14DNV)
Note: Please consult the sales office for the above package availability.
HD74LS125ARPEL
SOP-14 pin (JEDEC)
EL (2,500 pcs/reel)
Pin Arrangement
1C
1
14
VCC
1A
2
13
4C
1Y
3
12
4A
2C
4
11
4Y
2A
5
10
3C
2Y
6
9
3A
GND
7
8
3Y
(Top view)
Function Table
Inputs
C
H
L
L
Note: H ; high level,
L ; low level,
X ; irrelevant,
Z ; off (high-impedance) state of a 3-state output
Rev.2.00, Feb.18.2005, page 1 of 4
A
X
L
H
Outputs
Y
Z
L
H