Product Flyer
Mixed Signal Division
October 2004
Version 1.1
MB86064
FME/MS/DAC80/FL/5085
Dual 14-bit 1GSa/s DAC
The Fujitsu MB86064 is a Dual 14-bit 1GSa/s digital to analog
converter (DAC), delivering exceptional dynamic performance.
Each high performance DAC core is capable of generating
multi-standard, multi-carrier communication transmit signals,
suitable for 2, 2.5 and 3G systems. DAC data is input via two
high-speed LVDS ports. These operate in a pseudo double data
rate (DDR) mode, with data latched on both rising and falling
edges. Alternatively, the device can be configured as a
multiplexed dual-port single DAC. To simplify system
integration the DAC operates from a clock running at half the
DAC conversion rate.
PLASTIC PACKAGE
EFBGA-120
Package Dimensions
12 mm x 12 mm
Features
PIN ASSIGNMENT
AC17
AB18
AA19
AC11
AB12
AA13
AC7
X_A7
A7
X_A5
A5
DVDD
X_A4
W23
AA5
AA7
A2
DVDD
R21
P20
P22
N21
N23
M22
L23
M20
L21
K22
J23
K20
J21
H22
G23
H20
G21
F22
NC
N12
N14
M13
M15
L14
A3
X_A1
K15
N10
M11
L12
M9
J12
J10
D16
D8
C17
C19
B18
D14
D12
C13
C15
A15
D10
C11
B12
B14
B16
A17
A13
C9
B10
A11
M4
B7
X_B5
N1
B5
DVDD
L1
X_B4
B4
X_B2
B2
P2
N3
M2
H4
L3
K2
J3
J1
H2
G3
F4
G1
F2
E3
E1
DVDD
DVDD
DVSS
D6
C7
B8
A9
DVDD
X_B7
R1
T2
R3
P4
K4
DVSS
NC
NC
X_B9
B9
U1
V2
U3
B1
K9
All centre pins : TG
A19
T4
W1
W3
V4
X_B3
B3
X_B1
L10
K11
K13
J14
P9
X_B10
B10
DVSS
X_B8
B8
X_B6
B6
DVSS
R10
P11
P13
Y6
SERIAL_IN
SERIAL_EN
AVSS
IOUTB_B
E21
X_A6
A6
DVSS
X_A3
A1
DVSS
NC
R12
R14
P15
Y8
IOUT_B
AVD33
BGAP
AVD18_CLK
AVD25
AVD33
IOUT_A
IOUTB_A
E23
F20
A10
DVSS
X_A8
A8
AVSS
DAC_SCAN
SPARE
DVDD
DVSS
T20
T22
A4
X_A2
V20
U21
R23
Y16
X_A10
W21
V22
U23
Y10
AC5
AB6
AB8
AA9
B11
X_B11
DVSS
B13
X_B13
X_LPCLK_IN
LPCLK_IN
DVSS
LPCLK_OUT
X_LPCLK_OUT
X_A13
A13
Y12
Y14
AC9
AB10
AA11
DVSS
X_A11
A11
X_A9
A9
DVDD
C5
Index
B6
A7
A5
VLOW_A
AVD18_A
AVD18_A
X_RESET
TEST
SERIAL_OUT
SERIAL_CLK
AVD18_B
AVD18_B
VLOW_B
VREF
RREF
AVSS
CLKIN
CLKINB
Applications
Copyright © 2004 Fujitsu Microelectronics Europe GmbH
AB14
AA15
Y18
D18
• Multi-carrier, Multi-standard cellular infrastructure
• CDMA, W-CDMA, GSM/EDGE, UMTS
• Wideband communications systems
• High Direct-IF architectures
• Arbitrary waveform generation
• Test equipment
• Radar, video & display systems
AC13
AC15
AB16
AA17
CLK2_OUT
AC19
B12
X_B12
DVDD
B14
X_B14
X_CLK2_OUT
A12
DVDD
CLK1_OUT
X_CLK1_OUT
X_A14
A14
DVDD
X_A12
• Dual 14-bit, 1GSa/s Digital to Analog conversion
• Exceptional dynamic performance
• 74dBc ACLR for 4 UMTS carriers @ 276MHz direct-IF
• 100MHz image-free generated bandwidth capability
• supports UMTS plus digital pre-distortion bandwidth
• Proprietary performance enhancement features
• LVDS data interface
• Register selectable on-chip LVDS termination resistors
• Fujitsu 4-wire serial control interface
• Two 16k point programmable on-chip waveform memories
• Low power 3.3V analog and 1.8V digital operation
• 750mW per DAC power dissipation at 1GSa/s
• 0.18µm CMOS technology with Triple Well
• Performance enhanced EFBGA package
• Industrial temperature range (-40°C to +85°C)
Not to scale. Viewed from above.
Production
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Disclaimer: The contents of this document are subject to change without notice. Customers are advised to consult with FUJITSU sales representatives before
ordering.The information and circuit diagrams in this document are presented “as is”, no license is granted by implication or otherwise.
