FDG6318PZ
Dual P-Channel, Digital FET
General Description
Features
These dual P-Channel logic level enhancement mode
MOSFET are produced using Fairchild Semiconductor’s
especially tailored to minimize on-state resistance. This
device has been designed especially for bipolar digital
transistors and small signal MOSFETS
• -0.5A, -20V.
r DS(ON) = 780mΩ (Max)@ VGS = -4.5 V
rDS(ON) = 1200mΩ (Max) @ V GS = -2.5 V
• Very low level gate drive requirements allowing direct
operation in 3V circuits (V GS(TH) < 1.5V).
• Gate-Source Zener for ESD ruggedness (>1.4kV Human
Body Model).
Applications
• Battery management
• Compact industry standard SC-70-6 surface mount
package.
S
G
S 1 or 4
5 or 2 G
D 3 or 6
D
6 or 3 D
G 2 or 5
D
4 or 1 S
G
Pin 1
S
SC70-6
The pinouts are symmetrical; pin1 and pin 4 are interchangeable.
MOSFET Maximum Ratings TA=25°C unless otherwise noted
Symbol
VDSS
Drain to Source Voltage
Parameter
Ratings
-20
Units
V
VGS
Gate to Source Voltage
±12
V
-0.5
A
-0.3
A
Drain Current
Continuous (TC = 25oC, VGS = - 4.5V)
ID
o
Continuous (TC = 100 C, VGS = - 2.5V)
Pulsed
Figure 4
PD
Power dissipation
0.3
W
Derate above 25°C
2.4
mW/oC
TJ, TSTG
Operating and Storage Temperature
ESD
Electrostatic Discharge Rating MIL-STD-883D
Human Body Model ( 100pF / 1500Ω )
o
-55 to 150
C
1.4
kV
Thermal Characteristics
RθJA
Thermal Resistance Junction to Ambient (Note 1)
415
o
C/W
Package Marking and Ordering Information
Device Marking
.68
©2003 Fairchild Semiconductor Corporation
Device
FDG6318PZ
Package
SC70-6
Reel Size
7”
Tape Width
8 mm
Quantity
3000
FDG6318PZ Rev. B
FDG6318PZ
January 2003
FDG6318PZ
Typical Characteristic
TA = 25°C unless otherwise noted
0.6
1.2
-ID, DRAIN CURRENT (A)
POWER DISSIPATION MULTIPLIER
1.0
0.8
0.6
0.4
VGS = -4.5V
0.4
VGS = -2.5V
0.2
0.2
0
0
0
25
50
75
100
125
150
25
50
TA , AMBIENT TEMPERATURE (oC)
75
100
125
150
TA, CASE TEMPERATURE (oC)
Figure 1. Normalized Power Dissipation vs
Ambient Temperature
Figure 2. Maximum Continuous Drain Current vs
Case Temperature
2
DUTY CYCLE - DESCENDING ORDER
0.5
0.2
0.1
0.05
0.02
0.01
ZθJA, NORMALIZED
THERMAL IMPEDANCE
1
PDM
0.1
t1
t2
NOTES:
DUTY FACTOR: D = t1/t2
PEAK TJ = PDM x ZθJA x RθJA + TA
0.01
10-5
10 -4
10-3
10-2
10-1
100
101
102
10 3
t , RECTANGULAR PULSE DURATION (s)
Figure 3. Normalized Maximum Transient Thermal Impedance
20
-IDM, PEAK CURRENT (A)
TA = 25 oC
TRANSCONDUCTANCE
MAY LIMIT CURRENT
IN THIS REGION
10
FOR TEMPERATURES
ABOVE 25oC DERATE PEAK
CURRENT AS FOLLOWS:
I = I25
150 - TA
125
1
VGS = -4.5V
VGS = -2.5V
0.4
10-5
10 -4
10-3
10 -2
10-1
100
10 1
102
103
t, PULSE WIDTH (s)
Figure 4. Peak Current Capability
©2003 Fairchild Semiconductor Corporation
FDG6318PZ Rev. B
