Intel StrataFlash® Embedded Memory (P33)
Datasheet
Product Features
High performance:
— 85 ns initial access
— 52MHz with zero wait states, 17ns clock-todata output synchronous-burst read mode
— 25 ns asynchronous-page read mode
— 4-, 8-, 16-, and continuous-word burst mode
— Buffered Enhanced Factory Programming
(BEFP) at 5 µs/byte (Typ)
— 3.0 V buffered programming at 7 µs/byte
(Typ)
Architecture:
— Multi-Level Cell Technology: Highest Density
at Lowest Cost
— Asymmetrically-blocked architecture
— Four 32-KByte parameter blocks: top or
bottom configuration
— 128-KByte main blocks
Voltage and Power:
— VCC (core) voltage: 2.3 V – 3.6 V
— VCCQ (I/O) voltage: 2.3 V – 3.6 V
— Standby current: 35µA (Typ) for 64-Mbit
— 4-Word synchronous read current:
16 mA (Typ) at 52MHz
Quality and Reliability
— Operating temperature: –40 °C to +85 °C
— Minimum 100,000 erase cycles per block
— ETOX™ VIII process technology
Security:
— One-Time Programmable Registers:
— 64 unique factory device identifier bits
— 2112 user-programmable OTP bits
— Selectable OTP space in Main Array:
— Four pre-defined 128-KByte blocks (top or
bottom configuration).
— Up to Full Array OTP Lockout
— Absolute write protection: VPP = VSS
— Power-transition erase/program lockout
— Individual zero-latency block locking
— Individual block lock-down capability
Software:
— 20 µs (Typ) program suspend
— 20 µs (Typ) erase suspend
— Intel® Flash Data Integrator optimized
— Basic Command Set and Extended Command
Set compatible
— Common Flash Interface capable
Density and Packaging
— 56-Lead TSOP package (64, 128, 256, 512Mbit)
— 64-Ball Intel® Easy BGA package (64, 128,
256, 512-Mbit)
— Intel® QUAD+ SCSP (64, 128, 256, 512-Mbit)
— 16-bit wide data bus
Order Number: 314749-004
November 2007
