SN74LVC2T45
DUAL-BIT DUAL-SUPPLY BUS TRANSCEIVER
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS
www.ti.com
SCES516G – DECEMBER 2003 – REVISED FEBRUARY 2006
FEATURES
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Available in the Texas Instruments
NanoStar™ and NanoFree™ Packages
Fully Configurable Dual-Rail Design Allows
Each Port to Operate Over the Full 1.65-V to
5.5-V Power-Supply Range
VCC Isolation Feature – If Either VCC Input Is at
GND, Both Ports Are in the High-Impedance
State
DIR Input Circuit Referenced to VCCA
Low Power Consumption, 10-µA Max ICC
±24-mA Output Drive at 3.3 V
Ioff Supports Partial-Power-Down Mode
Operation
Max Data Rates
– 420 Mbps (3.3-V to 5-V Translation)
– 210 Mbps (Translate to 3.3 V)
– 140 Mbps (Translate to 2.5 V)
– 75 Mbps (Translate to 1.8 V)
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
ESD Protection Exceeds JESD 22
– 4000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
DCT OR DCU PACKAGE
(TOP VIEW)
VCCA
A1
A2
GND
1
8
2
7
3
6
4
5
VCCB
B1
B2
DIR
YEP OR YZP PACKAGE
(BOTTOM VIEW)
GND
D1
4 5
D2
A2
A1
C1
3
6
C2
B1
2 7
B2
VCCA
A1
1 8
A2
DIR
B2
B1
VCCB
DESCRIPTION/ORDERING INFORMATION
This dual-bit noninverting bus transceiver uses two separate configurable power-supply rails. The A port is
designed to track VCCA. VCCA accepts any supply voltage from 1.65 V to 5.5 V. The B port is designed to track
VCCB. VCCB accepts any supply voltage from 1.65 V to 5.5 V. This allows for universal low-voltage bidirectional
translation between any of the 1.8-V, 2.5-V, 3.3-V, and 5-V voltage nodes.
ORDERING INFORMATION
PACKAGE (1)
TA
NanoStar – WCSP (DSBGA)
0.23-mm Large Bump – YEP
NanoFree – WCSP (DSBGA)
0.23-mm Large Bump – YZP (Pb-free)
–40°C to 85°C
SSOP – DCT
VSSOP – DCU
(1)
(2)
ORDERABLE PART NUMBER
TOP-SIDE MARKING (2)
SN74LVC2T45YEPR
Reel of 3000
_ _ _TB_
SN74LVC2T45YZPR
Reel of 3000
SN74LVC2T45DCTR
Reel of 250
SN74LVC2T45DCTT
Reel of 3000
SN74LVC2T45DCUR
Reel of 250
SN74LVC2T45DCUT
CT2_ _ _
CT2_
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
DCT: The actual top-side marking has three additional characters that designate the year, month, and assembly/test site.
DCU: The actual top-side marking has one additional character that designates the assembly/test site.
YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following
character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, • = Pb-free).
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NanoStar, NanoFree are trademarks of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2003–2006, Texas Instruments Incorporated
