TC74VHCT573AF/AFT/AFK
TOSHIBA CMOS Digital Integrated Circuit
Silicon Monolithic
TC74VHCT573AF, TC74VHCT573AFT, TC74VHCT573AFK
Octal D-Type Latch with 3-State Output
The TC74VHCT573A is an advanced high speed CMOS OCTAL
LATCH with 3-STATE OUTPUT fabricated with silicon gate
C2MOS technology.
It achieves the high speed operation similar to equivalent
Bipolar Schottky TTL while maintaining the CMOS low power
dissipation.
This 8-bit D-type latch is controlled by a latch enable input
(LE) and an output enable input ( OE ).
When the OE input is high, the eight outputs are in a high
impedance state.
The input voltage are compatible with TTL output voltage.
This device may be used as a level converter for interfacing 3.3
V to 5 V system.
Input protection and output circuit ensure that 0 to 5.5 V can
be applied to the input and output (Note) pins without regard to
the supply voltage. These structure prevents device destruction
due to mismatched supply and input/output voltages such as
battery back up, hot board insertion, etc.
Note:
TC74VHCT573AF
TC74VHCT573AFT
Output in off-state
TC74VHCT573AFK
Features
•
High speed: tpd = 7.7 ns (typ.) at VCC = 5 V
•
Low power dissipation: ICC = 4 μA (max) at Ta = 25°C
•
Compatible with TTL inputs:
•
Power down protection is provided on all inputs and outputs.
VIL = 0.8 V (max)
VIH = 2.0 V (min)
•
Balanced propagation delays: tpLH ≈ tpHL
•
Low noise: VOLP = 1.5 V (max)
•
Pin and function compatible with the 74 series
(74AC/HC/F/ALS/LS etc.) 573 type.
Weight
SOP20-P-300-1.27A:
TSSOP20-P-0044-0.65A:
VSSOP20-P-0030-0.50:
0.22 g (typ.)
0.08 g (typ.)
0.03 g (typ.)
Start of commercial production
1995-12
1
2014-03-01
