HD74LVC16244A
16-bit Buffers / Line Drivers with 3-state Outputs
REJ03D0364–0400Z
(Previous ADE-205-119B (Z))
Rev.4.00
Jul. 29, 2004
Description
The HD74LVC16244A has sixteen line drivers with three state outputs in a 48 pin package. This device is a non
inverting buffer and has two active low enables (1G to 4G). Each enable independently controls four buffers. Low
voltage and high-speed operation is suitable at the battery drive product (note type personal computer) and low power
consumption extends the life of a battery for long time operation.
Features
•
•
•
•
•
•
•
VCC = 2.0 V to 5.5 V
All inputs VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V)
All outputs VOUT (Max.) = 5.5 V (@VCC = 0 V or output off state)
Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C)
Typical VOH undershoot > 2.0 V (@VCC = 3.3 V, Ta = 25°C)
High output current ±24 mA (@VCC = 3.0 V to 5.5 V)
Ordering Information
Part Name
Package Type
Package Code
Package
Abbreviation
Taping Abbreviation
(Quantity)
HD74LVC16244ATEL
TSSOP–48 pin
TTP–48DBV
T
EL (1,000 pcs/reel)
Function Table
Inputs
G
A
Output Y
H
L
L
X
H
L
Z
H
L
H:
L:
X:
Z:
High level
Low level
Immaterial
High impedance
Rev.4.00 Jul. 29, 2004 page 1 of 7
HD74LVC16244A
Absolute Maximum Ratings
Item
Symbol
Ratings
Unit
Supply voltage
VCC
Input diode current
Input voltage
Output diode current
IIK
VI
IOK
V
mA
V
mA
Output voltage
VO
Output current
VCC, GND current / pin
Storage temperature
IO
ICC or IGND
Tstg
–0.5 to 6.0
–50
–0.5 to 6.0
–50
50
–0.5 to VCC +0.5
–0.5 to 6.0
±50
100
–65 to +150
V
Conditions
VI = –0.5 V
VO = –0.5 V
VO = VCC+0.5 V
Output "H" or "L"
Output "Z" or VCC:OFF
mA
mA
°C
Note: The absolute maximum ratings are values, which must not individually be exceeded, and furthermore, no two of
which may be realized at the same time.
Recommended Operating Conditions
Item
Symbol
Ratings
Unit
Conditions
Supply voltage
VCC
1.5 to 5.5
V
Data hold
Input / output voltage
VI
VO
V
V
At operation
G, A
Output "H" or "L"
Output "Z" or VCC:OFF
Operating temperature
Output current
Ta
IOH
IOL
Input rise / fall time *1
tr, tf
2.0 to 5.5
0 to 5.5
0 to VCC
0 to 5.5
–40 to 85
–12
–24*2
12
24*2
10
°C
mA
mA
ns/V
Notes: 1. This item guarantees maximum limit when one input switches.
Waveform: Refer to test circuit of switching characteristics.
2. Duty cycle ≤ 50%
Rev.4.00 Jul. 29, 2004 page 3 of 7
VCC = 2.7 V
VCC = 3.0 V to 5.5 V
VCC = 2.7 V
VCC = 3.0 V to 5.5 V
