SN74LVC2G126
DUAL BUS BUFFER GATE
WITH 3-STATE OUTPUTS
www.ti.com
SCES205I – APRIL 1999 – REVISED JUNE 2006
FEATURES
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Available in the Texas Instruments
NanoStar™ and NanoFree™ Packages
Supports 5-V VCC Operation
Inputs Accept Voltages to 5.5 V
Max tpd of 4 ns at 3.3 V
Low Power Consumption, 10-µA Max ICC
±24-mA Output Drive at 3.3 V
Typical VOLP (Output Ground Bounce)
<0.8 V at VCC = 3.3 V, TA = 25°C
Typical VOHV (Output VOH Undershoot)
>2 V at VCC = 3.3 V, TA = 25°C
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DCT PACKAGE
(TOP VIEW)
Ioff Supports Partial-Power-Down Mode
Operation
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
YEA, YEP, YZA,
OR YZP PACKAGE
(BOTTOM VIEW)
DCU PACKAGE
(TOP VIEW)
1OE
1
8
VCC
1A
2
7
2OE
2Y
3
6
1Y
GND
4
5
1OE
1A
2Y
GND
1
8
2
7
3
6
4
5
VCC
2OE
1Y
2A
GND
2Y
1A
1OE
4 5
3 6
2 7
1 8
2A
1Y
2OE
VCC
2A
See mechanical drawings for dimensions.
DESCRIPTION/ORDERING INFORMATION
This dual bus buffer gate is designed for 1.65-V to 5.5-V VCC operation.
NanoStar™ and NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the
die as the package.
ORDERING INFORMATION
PACKAGE (1)
TA
ORDERABLE PART NUMBER
NanoStar™ – WCSP (DSBGA)
0.17-mm Small Bump – YEA
NanoFree™ – WCSP (DSBGA)
0.17-mm Small Bump – YZA (Pb-free)
–40°C to 85°C
NanoStar™ – WCSP (DSBGA)
0.23-mm Large Bump – YEP
SN74LVC2G126YEAR
SN74LVC2G126YZAR
Reel of 3000
VSSOP – DCU
(1)
(2)
_ _ _CN_
SN74LVC2G126YEPR
NanoFree™ – WCSP (DSBGA)
0.23-mm Large Bump – YZP (Pb-free)
SSOP – DCT
TOP-SIDE MARKING (2)
SN74LVC2G126YZPR
Reel of 3000
SN74LVC2G126DCTR
Reel of 3000
SN74LVC2G126DCUR
Reel of 250
SN74LVC2G126DCUT
C26_ _ _
C26_
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
DCT: The actual top-side marking has three additional characters that designate the year, month, and assembly/test site.
DCU: The actual top-side marking has one additional character that designates the assembly/test site.
YEA/YZA,YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one
following character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, • = Pb-free).
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NanoStar, NanoFree are trademarks of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 1999–2006, Texas Instruments Incorporated
