YGV617B
AVDP3
Advanced Video Display Processor 3
xOUTLINE
YGV617B has a built-in PLL circuit which allow to superimpose the images outputted by the device over an external video
signals easier.
Since this device has a high speed drawing function and character drawing function and is able to specify vertical and horizontal size of the screen optionally, it is applicable to controlling display units such as a wide screen TV and liquid crystal
displays.
These features make this device best suited to uses such as multi-vision display of automobile audio system, display of automobile navigation system, OSD of wide screen TV, video editing equipment and karaoke equipment.
This device has I/O pins for RGB (YUV) data, with which it is also suited to digital video applications such as DVD player
and set-top-boxes.
xFEATURES
[Functions]
9 Bit map plane is able to display images simultaneously using 16 colors, 256 colors or 32768 colors.
9 A sprite is able to use 32 x 32 dots.
9 The sprite plane can be used as a crosshair line cursor.
9 A monitor synchronization frequency, dot clock frequency and display screen resolution can be specified optionally.
9 High resolution display and interlaced scanning can be used.
9 All direction smooth scroll (spherical scroll) function can be used.
9 Has a built-in color look up table of 256 words x 16 bits, where display colors can be selected from 32768 colors.
9 Linear RGB output is obtained with the built-in DAC.
9 The built-in PLL circuit enables the device to generate clock signals that is synchronized with external video signals.
9 By generating dot clock signals that are synchronized with sub carrier clock signals, the device makes clear image at an
optional resolution without misalignment of colors.
9 Provides various drawing command functions.
[CPU Interface]
9 16 bit or 8 bit asynchronous interface
9 Registers and various I/O ports are mapped on the 16 byte I/O space.
9 Video memory up to 2 Mbytes can be mapped directly on the memory space of the system.
9 Has a built-in drawing data FIFO, and CPU interrupt function.
9 When connected with an external DMA controller, command drawing data can be transferred through DMA.
[Other Features]
9 One unit of 4 M or 16 M DRAM with 16 bit configuration can be connected.
9 Since clock signals for video memory can be inputted in addition to clock signals for display, an access speed that is the
most suitable to the DRAM to be connected can be specified.
9 The built-in FIFO for display data has reduced overhead at draw data access, achieving high speed drawing.
9 Has digital RGB I/O pins, YS pin and attribute output pin.
9 144 pin plastic SQFP.
9 CMOS and 5 V single power supply
YGV617B CATALOG
CATALOG No. : LSI-4GV617B2
1998. 1
