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DRA4114T

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This product complies with the RoHS Directive (EU 2002/95/EC). DRA4114T (Tentative) Silicon PNP epitaxial planar type For digital circuits  Packaging  Package Radial type: 5000 pcs / carton  Code NS-B1-B  Name Pin 1: Emitter 2: Collector 3: Base  Absolute Maximum Ratings Ta = 25°C Parameter Symbol Rating Unit Collector-base voltage (Emitter open) VCBO –50 V Collector-emitter voltage (Base open) VCEO –50 V Collector current IC –100 mA Total power dissipation PT 300 mW Junction temperature Tj 150 °C Storage temperature Tstg –55 to +150 °C  Marking Symbol: LD  Internal Connection B C R1 E Resistance value R1 10 kΩ  Electrical Characteristics Ta = 25°C±3°C Parameter Symbol Conditions Min Typ Max Unit Collector-base voltage (Emitter open) VCBO IC = –10 µA, IE = 0 –50 V Collector-emitter voltage (Base open) VCEO IC = –2 mA, IB = 0 –50 V Collector-base cutoff current (Emitter open) ICBO VCB = –50 V, IE = 0 – 0.1 µA Collector-emitter cutoff current (Base open) ICEO VCE = –50 V, IB = 0 – 0.5 µA Emitter-base cutoff current (Collector open) IEBO VEB = –6 V, IC = 0 – 0.01 mA Forward current transfer ratio hFE VCE = –10 V, IC = –5 mA 460  – 0.25 V Collector-emitter saturation voltage VCE(sat) IC = –10 mA, IB = – 0.5 mA Input voltage (ON) VI(on) VCE = – 0.2 V, IC = –5 mA Input voltage (OFF) VI(off) 160 VCE = –5 V, IC = –100 µA Input resistance R1 –1.2 V – 0.4 –30% 10 V +30% kΩ Note) Measuring methods are based on JAPANESE INDUSTRIAL STANDARD JIS C 7030 measuring methods for transistors. Publication date: November 2009 ZJH00451AED 1

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