TC55NEM208AFGN/ATGN55,70
TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS
Lead-Free
524,288-WORD BY 8-BIT STATIC RAM
DESCRIPTION
The TC55NEM208AFGN/ATGN is a 4,194,304-bit static random access memory (SRAM) organized as 524,288
words by 8 bits. Fabricated using Toshiba's CMOS Silicon gate process technology, this device operates from a
single 5V ± 10% power supply. Advanced circuit technology provides both high speed and low power at an operating
current of 3 mA/MHz (typ) and a minimum cycle time of 55 ns. It is automatically placed in low-power mode at 1.8
µA standby current (typ) when chip enable ( CE ) is asserted high. There are two control inputs. CE is used to
select the device and for data retention control, and output enable ( OE ) provides fast memory access. This device is
well suited to various microprocessor system applications where high speed, low power and battery backup are
required. And, with a guaranteed operating range of −40° to 85°C, the TC55NEM208AFGN/ATGN can be used in
environments exhibiting extreme temperature conditions. The TC55NEM208AFGN/ATGN is available in a
standard plastic 32-pin small-outline package (SOP) and plastic 32-pin thin-small-outline package (TSOP).
FEATURES
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Low-power dissipation
Operating: 15 mW/MHz (typical)
Single power supply voltage of 5 V ± 10%
Power down features using CE .
Data retention supply voltage of 1.5 to 5.5 V
Direct TTL compatibility for all inputs and outputs
Wide operating temperature range of −40° to 85°C
Standby Current (maximum):20 µA
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TC55NEM208AFGN/ATGN
55
55 ns
70 ns
CE Access Time
55 ns
70 ns
OE Access Time
•
70
Access Time
•
PIN ASSIGNMENT (TOP VIEW)
Access Times (maximum):
30 ns
35 ns
Package:
SOP32-P-525-1.27 (AFGN)
(Weight:1.12 g typ)
TSOP II32-P-400-1.27 (ATGN) (Weight:0.52 g typ)
Lead-Free
PIN NAMES
32 PIN SOP & TSOP
A18
A16
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O1
I/O2
I/O3
GND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
VDD
A15
A17
R/W
A13
A8
A9
A11
OE
A10
CE
I/O8
I/O7
I/O6
I/O5
I/O4
A0~A18
Address Inputs
R/W
Read/Write Control
OE
Output Enable
CE
Chip Enable
I/O1~I/O8
Data Inputs/Outputs
VDD
Power (+5 V)
GND
Ground
(AFGN/ATGN)
2004-10-14
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