TMS320VC33
DIGITAL SIGNAL PROCESSOR
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High-Performance Floating-Point Digital
Signal Processor (DSP):
– TMS320VC33-150
13-ns Instruction Cycle Time
150 MFLOPS, 75 MIPS
– TMS320VC33-120)
17-ns Instruction Cycle Time
120 MFLOPS, 60 MIPS
32-Bit High-Performance CPU
16- / 32-Bit Integer and 32- / 40-Bit
Floating-Point Operations
Four Precoded Page Strobes to Simplify
Interface to I/O and Memory Devices
32-Bit Instruction Word, 24-Bit Addresses
Two 1K × 32-Bit Single-Cycle Dual-Access
On-Chip RAM Blocks
Two 16K × 32-Bit Single-Cycle Dual-Access
On-Chip RAM Blocks
Total of 1.1-Mbit On-Chip SRAM
Boot-Program Loader
x(TBD) PLL Clock Generator
On-Chip Memory-Mapped Peripherals:
– One Serial Port
– Two 32-Bit Timers
– One-Channel Direct Memory Access
(DMA) Coprocessor for Concurrent I/O
and CPU Operation
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Fabricated Using the 0.18-micron
(leff-effective gate length) TImeline™
Technology by Texas Instruments (TI™)
144-Pin Thin Quad Flat Pack (TQFP) (PGE
Suffix)
Eight Extended-Precision Registers
Two Address Generators With Eight
Auxiliary Registers and Two Auxiliary
Register Arithmetic Units (ARAUs)
Two Low-Power Modes
Two- and Three-Operand Instructions
Parallel Arithmetic / Logic Unit (ALU) and
Multiplier Execution in a Single Cycle
Block-Repeat Capability
Zero-Overhead Loops With Single-Cycle
Branches
Conditional Calls and Returns
Interlocked Instructions for
Multiprocessing Support
Bus-Control Registers Configure
Strobe-Control Wait-State Generation
3.3-V I/O Supply Voltage
1.8-V Core Supply Voltage
Very Low Power: < 200 mW @ 150 MFLOPS
description
The TMS320VC33 DSP is a 32-bit, floating-point processor manufactured in 0.18-micron four-level-metal
CMOS (TImeline) technology. The TMS320VC33 is part of the TMS320C3x generation of DSPs from Texas
Instruments.
The TMS320C3x’s internal busing and special digital-signal-processing instruction set have the speed and
flexibility to execute up to 150 million floating-point operations per second (MFLOPS). The TMS320C3x
optimizes speed by implementing functions in hardware that other processors implement through software or
microcode. This hardware-intensive approach provides performance previously unavailable on a single chip.
The TMS320C3x can perform parallel multiply and ALU operations on integer or floating-point data in a single
cycle. Each processor also possesses a general-purpose register file, a program cache, dedicated ARAUs,
internal dual-access memories, one DMA channel supporting concurrent I / O, and a short machine-cycle time.
High performance and ease of use are results of these features.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
TImeline and TI are trademarks of Texas Instruments Incorporated.
Copyright © 1999, Texas Instruments Incorporated
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
POST OFFICE BOX 1443
• HOUSTON, TEXAS 77251–1443
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PRODUCT PREVIEW
SPRS087 – FEBRUARY 1999
