Serial Configuration (EPCS) Devices
Datasheet
C51014-5.1
Datasheet
This datasheet describes serial configuration (EPCS) devices.
Supported Devices
Table 1 lists the supported Altera EPCS devices.
Table 1. Altera EPCS Devices
Memory Size
(bits)
On-Chip
Decompression
Support
ISP Support
Cascading
Support
Reprogrammable
Recommended
Operating
Voltage (V)
EPCS1
1,048,576
No
Yes
No
Yes
3.3
EPCS4
4,194,304
No
Yes
No
Yes
3.3
EPCS16
16,777,216
No
Yes
No
Yes
3.3
EPCS64
67,108,864
No
Yes
No
Yes
3.3
EPCS128
134,217,728
No
Yes
No
Yes
3.3
Device
f For more information about programming EPCS devices using the Altera
Programming Unit (APU) or Master Programming Unit (MPU), refer to the Altera
Programming Hardware Datasheet.
f The EPCS device can be re-programmed in system with ByteBlaster II download
cable or an external microprocessor using SRunner. For more information, refer to
AN418: SRunner: An Embedded Solution for Serial Configuration Device Programming.
Features
EPCS devices offer the following features:
■
■
Low cost, low pin count, and non-volatile memory
■
Low current during configuration and near-zero standby mode current
■
2.7-V to 3.6-V operation
■
EPCS1, EPCS4, and EPCS16 devices available in 8-pin small-outline integrated
circuit (SOIC) package
■
April 2014
Easy-to-use four-pin interface
■
101 Innovation Drive
San Jose, CA 95134
www.altera.com
Supports active serial (AS) x1 configuration scheme
EPCS64 and EPCS128 devices available in 16-pin SOIC package
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Active Serial FPGA Configuration
Page 3
Figure 1 shows the EPCS device block diagram.
Figure 1. EPCS Device Block Diagram
EPCS Device
nCS
Control
Logic
DCLK
DATA
I/O Shift
Register
Address Counter
Data Buffer
Decode Logic
ASDI
Status Register
Memory
Array
Accessing Memory in EPCS Devices
You can access the unused memory locations of the EPCS device to store or retrieve
data through the Nios processor and SOPC Builder. SOPC Builder is an Altera tool for
creating bus-based (especially microprocessor-based) systems in Altera devices.
SOPC Builder assembles library components such as processors and memories into
custom microprocessor systems.
SOPC Builder includes the EPCS device controller core, which is an interface core
designed specifically to work with the EPCS device. With this core, you can create a
system with a Nios embedded processor that allows software access to any memory
location within the EPCS device.
Active Serial FPGA Configuration
The following Altera FPGAs support the AS configuration scheme with EPCS devices:
■
Arria series
■
Cyclone series
■
All device families in the Stratix series except the Stratix device family
There are four signals on the EPCS device that interface directly with the FPGA’s
control signals. The EPCS device signals are DATA, DCLK, ASDI, and nCS interface with
the DATA0, DCLK, ASDO, and nCSO control signals on the FPGA, respectively.
1
April 2014
For more information about the EPCS device pin description, refer to Table 23 on
page 36.
Altera Corporation
Serial Configuration (EPCS) Devices Datasheet
