SN74AVC4T245
SCES576E – JUNE 2004 – REVISED DECEMBER 2011
www.ti.com
4-BIT DUAL-SUPPLY BUS TRANSCEIVER
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS
FEATURES
1
1
16
1DIR
2
15
3
14
1
1OE
2DIR
VCCA
VCCA
RSV PACKAGE
(TOP VIEW)
RGY PACKAGE
(TOP VIEW)
2OE
VCCB
16
2B1
D, DGV, OR PW PACKAGE
(TOP VIEW)
1B1
•
•
1B2
•
•
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
ESD Protection Exceeds JESD 22
– 8000-V Human-Body Model (A114-A)
– 150-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
2OE
•
•
Control Inputs VIH/VIL Levels Are Referenced to
VCCA Voltage
Fully Configurable Dual-Rail Design Allows
Each Port to Operate Over the Full 1.2-V to
3.6-V Power-Supply Range
I/Os Are 4.6-V Tolerant
Ioff Supports Partial Power-Down-Mode
Operation
Maximim Data Rates
– 380 Mbps (1.8-V to 3.3-V Translation)
– 200 Mbps (<1.8-V to 3.3-V Translation)
– 200 Mbps (Translate to 2.5 V or 1.8 V)
– 150 Mbps (Translate to 1.5 V)
– 100 Mbps (Translate to 1.2 V)
VCCB
•
16 15 14 13
1DIR
2
15
1OE
12
2B2
2DIR
3
14
2OE
2
11
GND
2A1
6
11
2B1
1A1
1OE
VCCB
1
1B2
4
13
1B1
10
2B2
GND
6
11
1B2
2B1
10
7
5
3
2A2
1A2
2A1
VCCA
1DIR
4
9
2A2
2A2
7
10
2B2
9
GND
8
5
6
7
8
9
GND
8
12
GND
GND
GND
or
FLOAT
2A1
1B1
12
1A2
13
5
1A1
4
2DIR
1A1
1A2
DESCRIPTION/ORDERING INFORMATION
This 4-bit noninverting bus transceiver uses two separate configurable power-supply rails. The A port is designed
to track VCCA. VCCA accepts any supply voltage from 1.2 V to 3.6 V. The B port is designed to track VCCB. VCCB
accepts any supply voltage from 1.2 V to 3.6 V. The SN74AVC4T245 is optimized to operate with VCCA/VCCB set
at 1.4 V to 3.6 V. It is operational with VCCA/VCCB as low as 1.2 V. This allows for universal low-voltage
bidirectional translation between any of the 1.2-V, 1.5-V, 1.8-V, 2.5-V, and 3.3-V voltage nodes.
The SN74AVC4T245 is designed for asynchronous communication between two data buses. The logic levels of
the direction-control (DIR) input and the output-enable (OE) input activate either the B-port outputs or the A-port
outputs or place both output ports into the high-impedance mode. The device transmits data from the A bus to
the B bus when the B-port outputs are activated, and from the B bus to the A bus when the A-port outputs are
activated. The input circuitry on both A and B ports is always active and must have a logic HIGH or LOW level
applied to prevent excess ICC and ICCZ.
The SN74AVC4T245 is designed so that the control pins (1DIR, 2DIR, 1OE, and 2OE) are supplied by VCCA.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
1
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Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2004–2011, Texas Instruments Incorporated
