EP5352Q/EP5362Q/EP5382Q
500/600/800mA Synchronous Buck Regulators
With Integrated Inductor
RoHS Compliant
Halogen Free
VIN
Product Overview
UVLO
Thermal Limit
Current Limit
ENABLE
Soft Start
P-Drive
(-)
Logic
VOUT
PWM
Comp
(+)
N-Drive
GND
VSENSE
Sawtooth
Generator
Compensation
Network
(-)
Switch
Error
Amp
VFB
(+)
DAC
VREF
Voltage
Select
Package Boundry
VS0 VS1 VS2
Product Highlights
• Revolutionary integrated inductor
• Very small solution foot print*
• Fully RoHS compliant; MSL 3 260° reflow
C
• Only two low cost components required
• 5mm x 4mm x1.1mm QFN package
• Wide 2.4V to 5.5V input range
• 500, 600, 800 mA output current versions
• Less than 1 µA standby current
• 4 MHz switching frequency
• Fast transient response
• Very low ripple voltage; 5mVp-p typical
• 3 Pin VID Output Voltage select
• External divider option
• Dynamically adjustable output
• Designed for Low noise/EMI
• Short circuit, UVLO, and thermal protection
The Ultra-Low-Profile EP53X2Q product family is
targeted to applications where board area and
profile are critical. EP53X2Q is a complete power
conversion solution requiring only two low cost
ceramic MLCC caps.
Inductor, MOSFETS,
PWM, and compensation are integrated into a
tiny 5mm x 4mm x 1.1mm QFN package. The
EP53x2Q family is engineered to simplify design
and to minimize layout constraints.
High
switching frequency and internal type III
compensation provides superior transient
response. With a 1.1 mm profile, the EP53x2 is
perfect for space and height limited applications.
A 3-pin VID output voltage select scheme
provides seven pre-programmed output voltages
along with an option for external resistor divider.
Output voltage can be programmed on-the-fly to
provide fast, dynamic voltage scaling.
Typical Application Circuit
VSense
ENABLE
VIN
Vin
2.2uF
Voltage
Select
VOUT
Vout
10µF
VFB
VS0
VS1
VS2
GND
Figure 1. Typical application circuit.
Applications
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Area constrained applications
Mobile multimedia, smartphone & PDA
Mobile and Cellular platforms
VoIP and Video phones
Personal Media Players
FPGA, DSP, IO & Peripherals
*Optimized PCB Layout file downloadable from the Enpirion Website to assure first pass design success
03132
09/23/2010
Rev: F
