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SSM3J09FU

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SSM3J09FU TOSHIBA Field Effect Transistor Silicon P Channel MOS Type SSM3J09FU Management Switch High Speed Switching Applications Unit: mm • Small package • Low on resistance: Ron = 2.7 Ω (max) (@VGS = −10 V) : Ron = 4.2 Ω (max) (@VGS = −4 V) Absolute Maximum Ratings (Ta = 25°C) Characteristics Symbol Rating Unit Drain-Source voltage VDS −30 V Gate-Source voltage VGSS ±20 V DC ID −200 Pulse IDP −400 PD (Note 1) 150 mW Channel temperature Tch 150 °C Storage temperature Tstg −55~150 °C Drain current Drain power dissipation (Ta = 25°C) Note: mA JEDEC ― JEITA SC-70 Using continuously under heavy loads (e.g. the application of TOSHIBA 2-2E1E high temperature/current/voltage and the significant change in temperature, etc.) may cause this product to decrease in the Weight: 0.006 g (typ.) reliability significantly even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum ratings. Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook (“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test report and estimated failure rate, etc). Note 1: Mounted on FR4 board 2 (25.4 mm × 25.4 mm × 1.6 t, Cu Pad: 0.6 mm × 3) Figure 1. Marking Figure 1: 25.4 mm × 25.4 mm × 1.6 t, Cu Pad: 0.6 mm2 × 3 Equivalent Circuit (top view) 3 3 0.6 mm 1.0 mm DK 1 2 1 2 Handling Precaution When handling individual devices (which are not yet mounting on a circuit board), be sure that the environment is protected against electrostatic electricity. Operators should wear anti-static clothing, and containers and other objects that come into direct contact with devices should be made of anti-static materials. 1 2007-11-01

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