LTC1657/LTC1657L
Parallel 16-Bit Rail-to-Rail
Micropower DAC
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FEATURES
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DESCRIPTIO
The LTC®1657/LTC1657L are complete single supply, railto-rail voltage output, 16-bit digital-to-analog converters
(DAC) in a 28-pin SSOP or PDIP package. They include a
rail-to-rail output buffer amplifier, an internal reference
and a double buffered parallel digital interface.
16-Bit Monotonic Over Temperature
Deglitched Rail-to-Rail Voltage Output: 8nV•s
ICC: 650µA Typ
Maximum DNL Error: ±1LSB
Settling Time: 20µs to ±1LSB
Built-In Reference: 2.048V (LTC1657)
1.25V (LTC1657L)
Internal Power-On Reset to Zero Volts
Asynchronous CLR Pin
Output Buffer Configurable for Gain of 1 or 2
Parallel 16-Bit or 2-Byte Double Buffered Interface
Narrow 28-Lead SSOP Package
Multiplying Capability
The LTC1657/LTC1657L have separate reference input
pins that can be driven by an external reference. The fullscale output can be 1 or 2 times the reference voltage
depending on how the X1/X2 pin is connected. The LTC1657
operates from a 4.5V to 5.5V supply and has an onboard
2.048V reference. The LTC1657L operates from a 2.7V to
5.5V supply and has an onboard 1.25V reference.
The LTC1657/LTC1657L are similar to Linear Technology Corporation’s LTC1450/LTC1450L 12-bit VOUT DAC
family, allowing an upgrade path. They are the only
buffered 16-bit parallel DACs in a 28-lead SSOP package
and include an onboard reference for stand alone
performance.
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APPLICATIO S
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Instrumentation
Digital Calibration
Industrial Process Control
Automatic Test Equipment
Communication Test Equipment
, LTC and LT are registered trademarks of Linear Technology Corporation.
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BLOCK DIAGRA
LTC1657: 4.5V TO 5.5V
LTC1657L: 2.7V TO 5.5V
23
22
REFOUT
19 D15 (MSB)
REFHI
24
VCC
REFERENCE
LTC1657: 2.048V
LTC1657L: 1.25V
18
17
MSB
8-BIT
INPUT
REGISTER
16
15
14
13
12
16-BIT
DAC
REGISTER
D8
11 D7
10
16-BIT
DAC
+
–
9
8
7
6
VOUT
LSB
8-BIT
INPUT
REGISTER
R
3 CSMSB
FROM
SYSTEM RESET
1 WR
2 CSLSB
27 CLR
Differential Nonlinearity
vs Input Code
1.0
4 D0 (LSB)
28 LDAC
LTC1657:
0V TO 4.096V
LTC1657L:
0V TO 2.5V
R
5
FROM
MICROPROCESSOR
DECODE LOGIC
25
DIFFERENTIAL NONLINEARITY (LSB)
DATA IN FROM
MICROPROCESSOR
DATA BUS
POWER-ON
RESET
GND
20
REFLO
26
0.6
0.4
0.2
0
–0.2
–0.4
–0.6
–0.8
–1.0
X1/X2
21
0.8
0
1657 TA01
16384
32768
49152
DIGITAL INPUT CODE
65535
1657 TA02
1
