TS5A1066
10-Ω SPST ANALOG SWITCH
www.ti.com
SCDS185B – JANUARY 2005 – REVISED APRIL 2006
FEATURES
•
•
•
•
•
•
•
DBV OR DCK PACKAGE
(TOP VIEW)
Low ON-State Resistance (10 Ω)
Control Inputs Are 5.5-V Tolerant
Low Charge Injection
Low Total Harmonic Distortion (THD)
1.65-V to 5.5-V Single-Supply Operation
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
ESD Performance Tested Per JESD 22
– 2000-V Human-Body Model
(A114-B, Class II)
– 1000-V Charged-Device Model (C101)
NO 1
5
V+
4
IN
COM 2
GND 3
YEP OR YZP PACKAGE
(BOTTOM VIEW)
GND 3
4
IN
5
V+
COM 2
NO 1
DESCRIPTION/ORDERING INFORMATION
The TS5A1066 is a single-pole single-throw (SPST) analog switch that is designed to operate from 1.65 V to
5.5 V. This device can handle both digital and analog signals, and signals up to V+ (peak) can be transmitted in
either direction.
SUMMARY OF CHARACTERISTICS
Single-Pole,
Single-Throw Demultiplexer
(1 × SPST)
Configuration
Number of channels
1
ON-state resistance (ron)
7.5 Ω
ON-state resistance flatness (ron(flat))
2.5 Ω
Turn-on/turn-off time (tON/tOFF)
9.5 ns/2 ns
Charge injection (QC)
1 pC
Bandwidth (BW)
400 MHz
OFF isolation (OISO)
–68 dB at 10 MHz
Total harmonic distortion (THD)
0.14%
Leakage current (ICOM(OFF)
±0.1 µA
Power-supply current (I+)
0.05 µA
5-pin DSBGA, SOT-23,
or SC-70
Package options
ORDERING INFORMATION
PACKAGE (1)
TA
ORDERABLE PART NUMBER
NanoStar™ – WCSP (DSBGA)
0.23-mm Large Bump - YEP
NanoFree™ – WCSP (DSBGA)
–40°C to 85°C 0.23-mm Large Bump – YZP
(Pb-free)
TOP-SIDE MARKING (2)
TS5A1066YEPR
Tape and reel
JD_
TS5A1066YZPR
SOT (SOT-23) – DBV
(1)
(2)
Tape and reel
TS5A1066DBVR
JAD_
SOT (SC-70) – DCK
Tape and reel
TS5A1066DCKR
JD_
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
DBV/DCK: The actual top-side marking has one additional character that designates the assembly/test site.
YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following
character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, • = Pb-free).
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2005–2006, Texas Instruments Incorporated