Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
X5R Dielectric, 4 – 50 VDC (Commercial Grade)
Overview
KEMET’s X5R dielectric features an 85°C maximum operating
temperature and is considered “semi-stable.” The Electronics
Components, Assemblies & Materials Association (EIA)
characterizes X5R dielectric as a Class II material. Components
of this classification are fixed, ceramic dielectric capacitors
suited for bypass and decoupling applications or for frequency
discriminating circuits where Q and stability of capacitance
characteristics are not critical. X5R exhibits a predictable change
in capacitance with respect to time and voltage and boasts
a minimal change in capacitance with reference to ambient
temperature. Capacitance change is limited to ±15% from -55°C
to +85°C.
Benefits
Applications
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Typical applications include decoupling, bypass, and filtering.
-55°C to +85°C operating temperature range
Pb-Free and RoHS Compliant
Temperature stable dielectric
EIA 0201, 0402, 0603, 0805, 1206, and 1210 case sizes
DC voltage ratings of 4 V, 6.3 V, 10 V, 16 V, 25 V, 35 V, and 50 V
Capacitance offerings ranging from 0.01 μF to 100 μF
Available capacitance tolerances of ±10% and ±20%
Non-polar device, minimizing installation concerns
100% pure matte tin-plated termination finish allowing for
excellent solderability
Ordering Information
C
1206
Ceramic
Case Size
(L" x W")
0201
0402
0603
0805
1206
1210
1
2
C
107
M
Specification/ Capacitance Code Capacitance
Series
(pF)
Tolerance
C = Standard
2 Significant
Digits + Number
of Zeros
K = ±10%
M = ±20%
9
P
Voltage
Dielectric
7=4V
9 = 6.3 V
8 = 10 V
4 = 16 V
3 = 25 V
6 = 35 V
5 = 50 V
P = X5R
A
C
TU
Failure Rate/
Termination Finish1
Design
A = N/A
Packaging/Grade
(C–Spec)2
C = 100% Matte Sn Blank = Bulk
TU = 7" Reel
Unmarked
TM = 7" Reel
Marked
Additional termination finish options may be available. Contact KEMET for details.
Additional reeling or packaging options may be available. Contact KEMET for details.
One world. One KEMET
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com
C1006_X5R_SMD • 5/29/2013
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Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs) – X5R Dielectric, 4 – 50 VDC (Commercial Grade)
Electrical Parameters/Characteristics
Item
Parameters/Characteristics
Operating Temperature Range
-55°C to +85°C
Capacitance Change with Reference to +25°C and 0 VDC Applied (TCC)
±15%
Aging Rate (Maximum % Capacitance Loss/Decade Hour)
4.0%
Dielectric Withstanding Voltage (DWV)
Dissipation Factor (DF) Maximum Limit @ 25ºC
Insulation Resistance (IR) Limit @ 25°C
250% of rated voltage
(5 ±1 seconds and charge/discharge not exceeding 50 mA)
See Dissipation Factor Limit Table
See Insulation Resistance Limit Table
(Rated voltage applied for 120 ±5 seconds @ 25°C)
Regarding aging rate: Capacitance measurements (including tolerance) are indexed to a referee time of 48 or 1,000 hours. Please refer to a part number specific
datasheet for referee time details.
To obtain IR limit, divide MΩ-µF value by the capacitance and compare to GΩ limit. Select the lower of the two limits.
Capacitance and dissipation factor (DF) measured under the following conditions:
1 kHz ±50 Hz and 1.0 ±0.2 Vrms if capacitance ≤ 10 µF
120 Hz ±10 Hz and 0.5 ±0.1 Vrms if capacitance > 10 µF
Note: When measuring capacitance it is important to ensure the set voltage level is held constant. The HP4284 and Agilent E4980 have a feature known as
Automatic Level Control (ALC). The ALC feature should be switched to "ON."
Post Environmental Limits
High Temperature Life, Biased Humidity, Moisture Resistance
Dielectric
Rated DC
Voltage
Capacitance
Value
> 25
X5R
Dissipation Factor
(Maximum %)
Insulation
Resistance
±20%
10% of Initial Limit
3.0
All
25
Capacitance
Shift
7.5
< 25
< 0.56 µF
7.5
< 25
≥ 0.56 µF
12.0
Dissipation Factor Limit Table
Rated DC Voltage
Capacitance
Dissipation Factor
50 – 200 V
All
3%
25 V
All
5%
< 25 V
< 0.56 µF
5%
< 25 V
≥ 0.56 µF
10%
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com
C1006_X5R_SMD • 5/29/2013
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