HD74HC125, HD74HC126
Quad. Bus Buffer Gates (with 3-state outputs)
REJ03D0565-0300
Rev.3.00
Mar 25, 2009
Description
The HD74HC125, HD74HC126 require the 3-state control input C to be taken high to put the output into the high
impedance condition, whereas the HD74HC125, HD74HC126 requires the control input to be low to put the output into
high impedance.
Features
•
•
•
•
•
•
High Speed Operation: tpd = 8 ns typ (CL = 50 pF)
High Output Current: Fanout of 15 LSTTL Loads
Wide Operating Voltage: VCC = 2 to 6 V
Low Input Current: 1 µA max
Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C)
Ordering Information
Package Type
Note:
Package
Abbreviation
PRDP0014AB-B
(DP-14AV)
P
SOP-14 pin (JEITA)
PRSP0014DF-B
(FP-14DAV)
FP
EL (2,000 pcs/reel)
SOP-14 pin (JEDEC)
PRSP0014DE-A
(FP-14DNV)
RP
EL (2,500 pcs/reel)
TSSOP-14 pin
HD74HC125P
HD74HC126P
HD74HC125FPEL
HD74HC126FPEL
HD74HC125RPEL
HD74HC126RPEL
HD74HC125TELL
HD74HC126TELL
Package Code
(Previous Code)
DILP-14 pin
Part Name
Taping Abbreviation
(Quantity)
PTSP0014JA-B
(TTP-14DV)
T
ELL (2,000 pcs/reel)
—
Please consult the sales office for the above package availability.
Function Table
Inputs
C
HC125
H
L
L
H:
L:
X:
Z:
HC126
L
H
H
High level
Low level
Irrelevant
Off (high-impedance) state of a 3-state output.
REJ03D0565-0300 Rev.3.00 Mar 25, 2009
Page 1 of 8
Output
A
Y
X
L
HC125
Z
L
HC126
Z
L
H
H
H
