TC7WB66FK
TOSHIBA CMOS Digital Integrated Circuit
Silicon Monolithic
TC7WB66FK
Dual Bus Switch
The TC7WB66FK is a low on-resistance, high-speed
CMOS2-bit bus switch. This bus switch allows the connections or
disconnections to be made with minimal propagation delay while
maintaining Low power dissipation which is the feature of
CMOS.
When output enable (OE) is at High level, the switch is on;
when at Low level, the switch is off.
P-MOS and N-MOS channel block means the device is suitable
for analog signal transmission.
All inputs are equipped with protector circuits to protect the
device from static discharge.
Weight: 0.01 g (typ.)
Features
•
Operating voltage: VCC = 2~5.5 V
•
High speed operation: tpd = 0.25 ns (max)
•
Ultra-low on resistance: RON = 5 Ω (typ.)
•
ESD performance: Machine model ≥ ±200 V
Human body model ≥ ±2000 V
•
High noise margin: VNIL = VNIH = 28% VCC (min)
•
Power-down protection for inputs (control inputs only)
•
Package: US8
Pin Assignment (top view)
VCC OE1
8
7
B2
6
A2
5
WB
66
1
A1
2
3
4
B1 OE2 GND
1
2007-10-19
TC7WB66FK
Electrical Characteristics
DC Characteristics (Ta = −40~85°C)
Characteristics
Symbol
Min
Test Condition
Typ.
(Note 1)
Max
VCC (V)
“H” level
VIH
⎯
2.0~5.5
0.7 ×
VCC
⎯
⎯
“L” level
VIL
⎯
2.0~5.5
⎯
⎯
0.3 ×
VCC
Unit
Control pin input
voltage
Control pin input leakage
current
V
IIN
VIN = 0~5.5 V
2.0~5.5
⎯
⎯
±1.0
μA
ISZ
A, B = 0~VCC, OE = GND
2.0~5.5
⎯
⎯
±1.0
μA
VIS = 0 V, IIS = 30 mA
4.5
⎯
3
7
VIS = 4.5 V, IIS = 30 mA
4.5
⎯
5
15
VIS = 2.4 V, IIS = 15 mA
4.5
⎯
6
12
VIS = 0 V, IIS = 24 mA
3.0
⎯
4
9
VIS = 3 V, IIS = 24 mA
3.0
⎯
7
20
VIS = 0 V, IIS = 8 mA
2.0
⎯
6
12
VIS = 2 V, IIS = 8 mA
2.0
⎯
10
30
VIN = VCC or GND, IOUT = 0
5.5
⎯
⎯
10
Off-state leakage current
(switch off)
ON resistance
(Note 2)
Quiescent supply current
RON
ICC
Ω
μA
Note 1: The typical values are at Ta = 25°C.
Note 2: Apply the specified current to the switch, then measure the voltages on pins A and B. The on-resistance is
the lower of the two.
AC Characteristics (Ta = −40~85°C)
Max
⎯
0.5
(Note) 3.3 ± 0.3
⎯
0.35
5.0 ± 0.5
⎯
0.25
⎯
11.5
3.3 ± 0.3
⎯
6
5.0 ± 0.5
⎯
4.5
2.0
⎯
11.5
3.3 ± 0.3
⎯
6.5
5.0 ± 0.5
Symbol
Min
2.0
Characteristics
⎯
5
Test Condition
Unit
VCC (V)
2.0
Propagation delay time
tpLH
(bus to bus)
tpHL
Output enable time
tpZL
Figure 1, Figure 2
Figure 1, Figure 3
tpZH
Output disable time
tpLZ
Figure 1, Figure 3
tpHZ
ns
ns
ns
Note: The propagation delay time is calculated by the RC (on-resistance and load capacitance) time constant.
Capacitive Characteristics (Ta = 25°C)
Characteristics
Symbol
Typ.
Test Condition
Unit
VCC (V)
Control pin input capacitance
CIN
Switch terminal capacitance
CI/O
(Note)
3
pF
(Note)
OE = GND
5.0
5.0
10
pF
Note: Guaranteed by design.
3
2007-10-19
