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TC7W125FU-TE12L
TC7W125FU TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC7W125FU Dual BUS Buffer The TC7W125FU is a high speed C2MOS Dual BUS Buffers fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent LSTTL while maintaining the C2MOS low power dissipation. The require 3-state control input G to be set high to place the output into the high impedance. All inputs are equipped with protection circuits against static discharge or transient excess voltage. Features Weight: 0.02 g (typ.) • High speed: tpd = 10 ns (typ.) at VCC = 5 V • Low power dissipation: ICC = 2 μA (max) at Ta = 25°C • High noise immunity: VNIH = VNIL = 28% VCC (min) • Output drive capability: 15 LSTTL loads • • Symmetrical output impedance: |IOH| = IOL = 6 mA (min) Balanced propagation delays: tpLH ∼ tpHL − • Wide operating voltage range: VCC (opr) = 2 to 6 V Absolute Maximum Ratings (Ta = 25°C) Characteristics Symbol Rating Unit Supply voltage range VCC −0.5 to 7 V DC input voltage VIN −0.5 to VCC + 0.5 V DC output voltage VOUT −0.5 to VCC + 0.5 V Input diode current IIK ±20 mA Output diode current IOK ±20 mA DC output current IOUT ±35 mA DC VCC/ground current ICC ±37.5 mA Power dissipation PD 300 mW Storage temperature range Tstg −65 to 150 °C TL 260 °C Lead temperature (10 s) Note: Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum ratings and the operating ranges. Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook (“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test report and estimated failure rate, etc). 1 2009-09-30
TOSHIBA
株式会社 東芝セミコンダクター＆ストレージ社
日本
半導体部門、DRAM、フラッシュメモリ、プロセッサ、汎用LSI
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