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74ACTQ00
74ACTQ00 Quiet Series Quad 2-Input NAND Gate General Description Features The ACTQ00 contains four 2-input NAND gates and utilizes NSC Quiet Series technology to guarantee quiet output switching and improve dynamic threshold performance FACT Quiet SeriesTM features GTOTM output control and undershoot corrector in addition to a split ground bus for superior ACMOS performance Y Y Y Y Y Y Logic Symbol ICC reduced by 50% Guaranteed simultaneous switching noise level and dynamic threshold performance Improved latch-up immunity Minimum 4 kV ESD protection Outputs source sink 24 mA ’ACTQ00 has TTL-compatible inputs Connection Diagram Pin Assignment for DIP and SOIC IEEE IEC TL F 10888 – 1 Pin Names Description An Bn On TL F 10888 – 2 Inputs Outputs FACTTM FACT Quiet SeriesTM and GTOTM are trademarks of National Semiconductor Corporation C1995 National Semiconductor Corporation TL F 10888 RRD-B30M75 Printed in U S A 74ACTQ00 Quiet Series Quad 2-Input NAND Gate March 1993 DC Characteristics for ’ACTQ Family Devices (Continued) 74ACTQ Symbol Parameter VCC (V) 74ACTQ TA e a 25 C TA e b 40 C to a 85 C Typ ICCT Maximum ICC Input IOLD Minimum Dynamic Output Current IOHD 55 Units Conditions Guaranteed Limits 06 15 mA V I e VCC b 2 1V 55 75 mA VOLD e 1 65V Max 55 b 75 mA VOHD e 3 85V Min 20 0 mA VIN e VCC or GND) ICC Maximum Quiescent Supply Current 55 VOLP Quiet Output Maximum Dynamic VOL 50 11 15 V Figures 2-12 13 (Notes 1 2) VOLV Quiet Output Minimum Dynamic VOL 50 b0 6 b1 2 V Figures 2-12 13 (Notes 1 2) VIHD Minimum High Level Dynamic Input Voltage 50 19 22 V (Notes 1 3) VILD Maximum Low Level Dynamic Input Voltage 50 12 08 V (Notes 1 3) 20 Maximum test duration 2 0 ms one output loaded at a time Note 1 Plastic DIP package Note 2 Max number of outputs defined as (n) Data inputs are 0V to 3V One output GND Note 3 Max number of data inputs (n) switching (n b 1) inputs switching 0V to 3V (’ACTQ) Input-under-test switching 3V to threshold (VILD) 0V to threshold (VIHD) f e 1 MHz AC Electrical Characteristics 74ACTQ Symbol Parameter TA e a 25 C CL e 50 pF VCC (V) 74ACTQ TA e b40 C to a 85 C CL e 50 pF Min tPLH Propagation Delay Data to Output 50 tPHL Propagation Delay Data to Output 50 tOSHL tOSLH Output to Output Skew Typ Units Max Min Max 20 75 20 80 ns 20 75 20 80 ns 10 ns 50 05 10 Voltage Range 5 0 is 5 0V g 0 5V Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device The specification applies to any outputs switching in the same direction either HIGH to LOW (tOSHL) or LOW to HIGH (tOSLH) Parameter guaranteed by design Capacitance Parameter Typ Units Conditions CIN Symbol Input Capacitance 45 pF VCC e OPEN CPD Power Dissipation Capacitance 74 pF VCC e 5 0V 3
NS
National Semiconductor Corporation 日本ではナショセミと略称されていたが2011年9月23日、米TI社に買収され、同社のシリコンバレー部門となった。
TI
Texas Instruments Incorporated
U.S.A
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