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74ACTQ244
54ACQ 74ACQ244 54ACTQ 74ACTQ244 Quiet Series Octal Buffer Line Driver with TRI-STATE Outputs General Description Features The ’ACQ ’ACTQ244 is an octal buffer and line driver designed to be employed as a memory address driver clock driver and bus oriented transmitter or receiver which provides improved PC board density The ACQ ACTQ utilizes NSC Quiet Series technology to guarantee quiet output switching and improved dynamic threshold performance FACT Quiet SeriesTM features GTOTM output control and undershoot corrector in addition to a split ground bus for superior performance Y Y Y Y Y Y Y Y Y Logic Symbol ICC and IOZ reduced by 50% Guaranteed simultaneous switching noise level and dynamic threshold performance Guaranteed pin-to-pin skew AC performance Improved latch-up immunity TRI-STATE outputs drive bus lines or buffer memory address registers Outputs source sink 24 mA Faster prop delays than the standard ’AC ’ACT244 4 kV minimum ESD immunity Standard Military Drawing (SMD) ’ACTQ244 5962-8776003 ’ACQ244 5962-92176 Connection Diagrams IEE IEC Pin Assignment for DIP Flatpak QSOP and SOIC Pin Assignment for LCC TL F 10235 – 3 TL F 10235 – 2 TL F 10235–1 Pin Names OE1 OE2 I0 – I7 O0 – O7 Truth Tables Description TRI-STATE Output Enable Inputs Inputs Outputs Inputs OE1 L L H Outputs (Pins 12 14 16 18) In L H X L H Z Inputs OE2 L L H TRI-STATE is a registered trademark of National Semiconductor Corporation FACTTM FACT Quiet SeriesTM and GTOTM are trademarks of National Semiconductor Corporation C1995 National Semiconductor Corporation TL F 10235 In Outputs (Pins 3 5 7 9) L H X H e HIGH Voltage Level L e LOW Voltage Level L H Z X e Immaterial Z e High Impedance RRD-B30M75 Printed in U S A 54ACQ 74ACQ244 54ACTQ 74ACTQ244 Quiet Series Octal Buffer Line Driver with TRI-STATE Outputs March 1993 DC Electrical Characteristics for ’ACQ Family Devices (Continued) 74ACQ Symbol Parameter VCC (V) 54ACQ 74ACQ TA e a 25 C TA e b 55 C to a 125 C TA e b 40 C to a 85 C Typ IOZ Maximum TRI-STATE Leakage Current 55 Units Conditions mA VI(OE) e VIL VIH VI e VCC GND VO e VCC GND Guaranteed Limits g 0 25 g5 0 g2 5 VOLP Quiet Output Maximum Dynamic VOL 50 11 15 V Figures 2-12 13 (Notes 2 3) VOLV Quiet Output Minimum Dynamic VOL 50 b0 6 b1 2 V Figures 2-12 13 (Notes 2 3) VIHD Minimum High Level Dynamic Input Voltage 50 31 35 V VILD Maximum Low Level Dynamic Input Voltage 50 19 15 V (Notes 2 4) (Notes 2 4) Note 1 IIN and ICC 3 0V are guaranteed to be less than or equal to the respective limit 5 5V VCC ICC for 54ACQ 25 C is identical to 74ACQ 25 C Note 2 Plastic DIP package Note 3 Max number of outputs defined as (n) Data Inputs are driven 0V to 5V One output GND Note 4 Max number of Data Inputs (n) switching (n b 1) Inputs switching 0V to 5V (’ACQ) Input-under-test switching 5V to threshold (VILD) 0V to threshold (VIHD) f e 1 MHz DC Electrical Characteristics for ’ACTQ Family Devices 74ACTQ Symbol Parameter VCC (V) 54ACTQ 74ACTQ TA e a 25 C TA e b 55 C to a 125 C TA e b 40 C to a 85 C Typ Units Conditions Guaranteed Limits VIH Minimum High Level Input Voltage 45 55 15 15 20 20 20 20 20 20 V VOUT e 0 1V or VCC b 0 1V VIL Maximum Low Level Input Voltage 45 55 15 15 08 08 08 08 08 08 V VOUT e 0 1V or VCC b 0 1V VOH Minimum High Level Output Voltage 45 55 4 49 5 49 44 54 44 54 44 54 V IOUT e b50 mA 3 86 4 86 3 70 4 70 3 76 4 76 V 01 01 01 01 01 01 V 45 55 0 36 0 36 0 50 0 50 0 44 0 44 V 45 55 VOL Maximum Low Level Output Voltage 45 55 0 001 0 001 VIN e VIL or VIH b 24 mA IOH b 24 mA IOUT e 50 mA VIN e VIL or VIH IOL 24 mA 24 mA IIN Maximum Input Leakage Current 55 g0 1 g1 0 g1 0 mA VI e VCC GND IOZ Maximum TRI-STATE Leakage Current 55 g 0 25 g5 0 g2 5 mA VI e VIL VIH VO e VCC GND ICCT Maximum ICC Input 55 16 15 mA VI e VCC b 2 1V IOLD Minimum Dynamic Output Current 55 50 75 mA 55 b 50 b 75 mA VOLD e 1 65V Max VOHD e 3 85V Min 80 0 40 0 mA VIN e VCC or GND (Note 1) IOHD 06 ICC Maximum Quiescent Supply Current 55 VOLP Quiet Output Maximum Dynamic VOL 50 11 15 V Figures 2-12 13 (Notes 2 3) VOLV Quiet Output Minimum Dynamic VOL 50 b0 6 b1 2 V Figures 2-12 13 (Notes 2 3) 40 All outputs loaded thresholds on input associated with output under test Maximum test duration 2 0 ms one output loaded at a time 3
NS
National Semiconductor Corporation 日本ではナショセミと略称されていたが2011年9月23日、米TI社に買収され、同社のシリコンバレー部門となった。
TI
Texas Instruments Incorporated
U.S.A
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