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74F573
54F 74F573 Octal D-Type Latch with TRI-STATE Outputs General Description Features The ’F573 is a high speed octal latch with buffered common Latch Enable (LE) and buffered common Output Enable (OE) inputs This device is functionally identical to the ’F373 but has different pinouts Y Y Y Y Y Commercial Inputs and outputs on opposite sides of package allowing easy interface with microprocessors Useful as input or output port for microprocessors Functionally identical to ’F373 TRI-STATE outputs for bus interfacing Guaranteed 4000V minimum ESD protection Package Number Military 74F573PC Package Description N20A 54F573DM (Note 2) 20-Lead (0 300 Wide) Molded Dual-In-Line J20A 20-Lead Ceramic Dual-In-Line 74F573SC (Note 1) M20B 20-Lead (0 300 Wide) Molded Small Outline JEDEC 74F573SJ (Note 1) M20D 20-Lead (0 300 Wide) Molded Small Outline EIAJ 54F573FM (Note 2) W20A 20-Lead Cerpak 54F573LM (Note 2) E20A 20-Lead Ceramic Leadless Chip Carrier Type C Note 1 Devices also available in 13 reel Use suffix e SCX and SJX Note 2 Military grade device with environmental and burn-in processing Use suffix e DMQB FMQB and LMQB Logic Symbols Connection Diagrams Pin Assignment for DIP SOIC and Flatpak Pin Assignment for LCC TL F 9566–1 IEEE IEC TL F 9566 – 3 TL F 9566 – 2 TL F 9566–4 TRI-STATE is a registered trademark of National Semiconductor Corporation C1995 National Semiconductor Corporation TL F 9566 RRD-B30M115 Printed in U S A 54F 74F573 Octal D-Type Latch with TRI-STATE Outputs August 1995 Absolute Maximum Ratings (Note 1) Recommended Operating Conditions If Military Aerospace specified devices are required please contact the National Semiconductor Sales Office Distributors for availability and specifications Storage Temperature b 65 C to a 150 b 55 C to a 125 b 55 C to a 175 b 55 C to a 150 Ambient Temperature under Bias Junction Temperature under Bias Plastic Free Air Ambient Temperature Military Commercial C C C C b 55 C to a 125 C 0 C to a 70 C Supply Voltage Military Commercial a 4 5V to a 5 5V a 4 5V to a 5 5V VCC Pin Potential to Ground Pin b 0 5V to a 7 0V b 0 5V to a 7 0V Input Voltage (Note 2) b 30 mA to a 5 0 mA Input Current (Note 2) Voltage Applied to Output in HIGH State (with VCC e 0V) b 0 5V to VCC Standard Output b 0 5V to a 5 5V TRI-STATE Output Current Applied to Output in LOW State (Max) twice the rated IOL (mA) ESD Last Passing Voltage (Min) 4000V Note 1 Absolute maximum ratings are values beyond which the device may be damaged or have its useful life impaired Functional operation under these conditions is not implied Note 2 Either voltage limit or current limit is sufficient to protect inputs DC Electrical Characteristics Symbol 54F 74F Parameter Min VIH Input HIGH Voltage VIL Input LOW Voltage VCD Input Clamp Diode Voltage VOH Output HIGH Voltage Typ Units VCC Conditions Max 20 54F 10% VCC 54F 10% VCC 74F 10% VCC 74F 10% VCC 74F 5% VCC 74F 5% VCC V Recognized as a HIGH Signal 08 V Recognized as a LOW Signal b1 2 V Min IIN e b18 mA V 25 24 25 24 27 27 Min IOH IOH IOH IOH IOH IOH IOL e 20 mA IOL e 24 mA e e e e e e b 1 mA b 3 mA b 1 mA b 3 mA b 1 mA b 3 mA VOL Output LOW Voltage 54F 10% VCC 74F 10% VCC 05 05 V Min IIH Input HIGH Current 54F 74F 20 0 50 mA Max VIN e 2 7V IBVI Input HIGH Current Breakdown Test 54F 74F 100 70 mA Max VIN e 7 0V ICEX Output HIGH Leakage Current 54F 74F 250 50 mA Max VOUT e VCC VID Input Leakage Test 74F V 00 IID e 1 9 mA All Other Pins Grounded IOD Output Leakage Circuit Current 74F 3 75 mA 00 VIOD e 150 mV All Other Pins Grounded IIL Input LOW Current b0 6 mA Max VIN e 0 5V IOZH Output Leakage Current 50 mA Max VOUT e 2 7V IOZL Output Leakage Current b 50 mA Max VOUT e 0 5V IOS Output Short-Circuit Current b 150 mA Max VOUT e 0V IZZ Bus Drainage Test 500 mA 0 0V VOUT e 5 25V ICCL Power Supply Current 35 55 mA Max VO e LOW ICCZ Power Supply Current 35 55 mA Max VO e HIGH Z 4 75 b 60 3
TI
Texas Instruments Incorporated
U.S.A
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