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74F827
54F 74F827 74F828 10-Bit Buffers Line Drivers General Description Features The ’F827 and ’F828 10-bit bus buffers provide high performance bus interface buffering for wide data address paths or buses carrying parity The 10-bit buffers have NOR output enables for maximum control flexibility The ’F827 and ’F828 are functionally- and pin-compatible to AMD’s Am29827 and Am29828 The ’F828 is an inverting version of the ’F827 Y Military Package Number N24C 54F827SDM (Note 2) Package Description 24-Lead (0 300 Wide) Molded Dual-In-Line et 74F827SPC Y TRI-STATE output ’F828 is inverting Direct replacement for AMD’s Am29827 and Am29828 e Commercial Y 24-Lead (0 300 Wide) Ceramic Dual-In-Line M24B 74F827SC (Note 1) J24F 24-Lead (0 300 Wide) Molded Small Outline JEDEC 54F827FM (Note 2) W24C 24-Lead Cerpack 54F827LM (Note 2) E28A 24-Lead Ceramic Leadless Chip Carrier Type C N24C 24-Lead (0 300 Wide) Molded Dual-In-Line bs ol 74F828SPC 74F828SC (Note 1) M24B 24-Lead (0 300 Wide) Molded Small Outline JEDEC Note 1 Devices also available in 13 reel Use suffix e SCX Note 2 Military grade device with environmental and burn-in processing Use suffix e SDMQB FMQB and LMQB Connection Diagrams Pin Assignment for DIP Flatpak and SOIC ’F827 Pin Assignment for LCC ’F827 O ’F828 TL F 9598 – 2 TL F 9598–1 TL F 9598 – 8 TRI-STATE is a registered trademark of National Semiconductor Corporation C1995 National Semiconductor Corporation TL F 9598 RRD-B30M75 Printed in U S A 54F 74F827 74F828 10-Bit Buffers Line Drivers December 1994 Unit Loading Fan Out 54F 74F Pin Names OE1 OE2 D 0 – D7 O0 – O7 Description UL HIGH LOW Input IIH IIL Output IOH IOL Output Enable Input 10 10 20 mA b0 6 mA Data Inputs 10 10 20 mA b0 6 mA Data Outputs TRI-STATE 600 106 6 (80) b12 mA 64 mA (48 mA) Function Table Functional Description The ’F827 and ’F828 are line drivers designed to be employed as memory address drivers clock drivers and busoriented transmitters receivers which provide improved PC board density The devices have TRI-STATE outputs controlled by the Output Enable (OE) pins The outputs can sink 64 mA (48 mA mil) and source 15 mA Input clamp diodes limit high-speed termination effects Inputs OE Outputs On Dn Function ’F827 L L H H L X ’F828 H L Z L H Z Transparent Transparent High Z e H e HIGH Voltage level L e LOW Voltage Level Z e High Impedance X e Immaterial et Logic Diagrams bs ol ’F827 TL F 9598 – 4 Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays O ’F828 TL F 9598 – 11 Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays 3
NS
National Semiconductor Corporation 日本ではナショセミと略称されていたが2011年9月23日、米TI社に買収され、同社のシリコンバレー部門となった。
TI
Texas Instruments Incorporated
U.S.A
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