74HC05
Hex inverter with open-drain outputs
Rev. 02 — 18 June 2009
Product data sheet
1. General description
The 74HC05 is a high-speed Si-gate CMOS device that complies with JEDEC standard
no. 7A.
The 74HC05 contains six inverters.The outputs of the 74HC05 are open-drain and can be
connected to other open-drain outputs to implement active-LOW wired-OR or active-HIGH
wired-AND functions. The open-drain outputs require pull-up resistors to perform correctly.
2. Features
I Wide operating voltage 2.0 V to 6.0 V
I Input levels:
N For 74HC05: CMOS level
I Latch-up performance exceeds 100 mA per JESD 78 Class II level A
I ESD protection:
N HBM JESD22-A114E exceeds 2000 V
N CDM JESD22-C101C exceeds 1000 V
I Multiple package options
I Specified from −40 °C to +85 °C and from −40 °C to +125 °C
3. Ordering information
Table 1.
Ordering information
Type number
Package
Temperature range
Name
Description
Version
74HC05D
−40 °C to +125 °C
SO14
plastic small outline package; 14 leads; body width
3.9 mm
SOT108-1
74HC05PW
−40 °C to +125 °C
TSSOP14
plastic thin shrink small outline package; 14 leads;
body width 4.4 mm
SOT402-1
74HC05BQ
−40 °C to +125 °C
DHVQFN14
plastic dual in-line compatible thermal enhanced very SOT762-1
thin quad flat package; no leads; 14 terminals;
body 2.5 × 3 × 0.85 mm
74HC05
NXP Semiconductors
Hex inverter with open-drain outputs
1
1A
terminal 1
index area
14 VCC
74HC05
1Y
13 6A
4
5
6
11 5A
2A
3
12 6Y
3A
2Y
4
11 5A
3Y
3A
5
10 5Y
3Y
6
9
4A
GND
7
8
4Y
10 5Y
8
2
12 6Y
4Y
1Y
3
2Y
14 VCC
7
1
13 6A
GND
1A
2
2A
74HC05
GND(1)
9
4A
001aak277
Transparent top view
001aak276
(1) The die substrate is attached to this pad using
conductive die attach material. It can not be used as a
supply pin or input.
Fig 4.
Pin configuration SOT402-1 (TSSOP14)
Fig 5.
Pin configuration SOT762-1 (DHVQFN14)
5.2 Pin description
Table 2.
Pin description
Symbol
Pin
Description
1A to 6A
1, 3, 5, 9, 11, 13
data input
1Y to 6Y
2, 4, 6, 8, 10, 12
data output
GND
7
ground (0 V)
VCC
14
supply voltage
6. Functional description
Table 3.
Function table[1]
Input
Output
nA
nY
L
Z
H
L
[1]
H = HIGH voltage level; L = LOW voltage level; Z = high-impedance OFF-state.
7. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
VCC
Conditions
Min
supply voltage
Max
Unit
−0.5
+7
V
IIK
input clamping current
VI < −0.5 V or VI > VCC + 0.5 V
[1]
-
20
mA
IOK
output clamping current
VO < −0.5 V or VO > VCC + 0.5 V
[1]
-
20
mA
[1]
−0.5
VCC + 0.5 V V
VO
output voltage
74HC05_2
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 02 — 18 June 2009
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