SN54/74LS147
SN54/74LS148
SN54/74LS748
10-LINE-TO-4-LINE
AND 8-LINE-TO-3-LINE
PRIORITY ENCODERS
The SN54 / 74LS147 and the SN54 / 74LS148 are Priority Encoders. They
provide priority decoding of the inputs to ensure that only the highest order
data line is encoded. Both devices have data inputs and outputs which are
active at the low logic level.
The LS147 encodes nine data lines to four-line (8-4-2-1) BCD. The implied
decimal zero condition does not require an input condition because zero is
encoded when all nine data lines are at a high logic level.
The LS148 encodes eight data lines to three-line (4-2-1) binary (octal). By
providing cascading circuitry (Enable Input EI and Enable Output EO) octal
expansion is allowed without needing external circuitry.
The SN54 / 74LS748 is a proprietary Motorola part incorporating a built-in
deglitcher network which minimizes glitches on the GS output. The glitch
occurs on the negative going transition of the EI input when data inputs 0 – 7
are at logical ones.
The only dc parameter differences between the LS148 and the LS748 are
that (1) Pin 10 (input 0) has a fan-in of 2 on the LS748 versus a fan-in of 1 on
the LS148; (2) Pins 1, 2, 3, 4, 11, 12 and 13 (inputs 1, 2, 3, 4, 5, 6, 7) have a
fan-in of 3 on the LS748 versus a fan-in of 2 on the LS148.
The only ac difference is that tPHL from EI to EO is changed from 40 to
45 ns.
SN54 / 74LS147
(TOP VIEW)
OUTPUT
VCC
16
INPUTS
10-LINE-TO-4-LINE
AND 8-LINE-TO-3-LINE
PRIORITY ENCODERS
LOW POWER SCHOTTKY
J SUFFIX
CERAMIC
CASE 620-09
16
1
N SUFFIX
PLASTIC
CASE 648-08
16
1
OUTPUT
NC
D
3
2
1
9
A
15
14
13
12
11
10
9
D
3
2
1
9
16
1
4
A
5
7
8
C
3
6
4
7
5
8
6
C
7
B
ORDERING INFORMATION
B
2
5
1
4
6
INPUTS
SN54LSXXXJ
SN74LSXXXN
SN74LSXXXD
8
GND
OUTPUTS
SN54 / 74LS148
SN54 / 74LS748
(TOP VIEW)
INPUTS
OUTPUTS
VCC
16
OUTPUT
EO
GS
3
2
1
0
A0
15
14
13
12
11
10
9
EO
GS
3
2
1
0
4
A0
5
1
4
6
7
EI
A2
A1
2
5
3
6
4
7
5
E1
6
A2
7
A1
INPUTS
D SUFFIX
SOIC
CASE 751B-03
8
GND
OUTPUTS
FAST AND LS TTL DATA
5-1
Ceramic
Plastic
SOIC
