a
Octal 14-Bit, Parallel Input,
Voltage-Output DAC
AD7841
GENERAL DESCRIPTION
FEATURES
Eight 14-Bit DACs in One Package
Voltage Outputs
Offset Adjust for Each DAC Pair
Reference Range of ؎5 V
Maximum Output Voltage Range of ؎10 V
؎15 V ؎ 10% Operation
Clear Function to User-Defined Voltage
44-Lead MQFP Package
The AD7841 contains eight 14-bit DACs on one monolithic
chip. It has output voltages with a full-scale range of ± 10 V
from reference voltages of ± 5 V.
The AD7841 accepts 14-bit parallel loaded data from the external bus into one of the input registers under the control of the
WR, CS, and DAC channel address pins, A0–A2.
The DAC outputs are updated on reception of new data into
the DAC registers. All the outputs may be updated simultaneously by taking the LDAC input low.
APPLICATIONS
Automatic Test Equipment
Process Control
General Purpose Instrumentation
Each DAC output is buffered with a gain-of-two amplifier into
which an external DAC offset voltage can be inserted via the
DUTGNDx pins.
The AD7841 is available in a 44-lead MQFP package.
FUNCTIONAL BLOCK DIAGRAM
VCC
VSS
VREF(+)
AB
VDD
VREF(–)
AB
DUTGND
CD
AD7841
14
DUTGND
AB
R
INPUT 14
REG
A
DAC 14
REG
A
DAC A
VOUTA
R
DB13
14
INPUT 14
REG
B
DAC
REG
B
DAC B
VOUTB
R
14
INPUT 14
REG
C
DAC
REG
C
14
R
DAC C
VOUTC
WR
R
14
ADDRESS
DECODE
CS
A1
R
14
DB0
A0
R
14
A2
INPUT 14
REG
D
DAC
REG
D
14
INPUT 14
REG
E
DAC
REG
E
14
INPUT 14
REG
F
DAC
REG
F
14
INPUT 14
REG
G
DAC
REG
G
14
INPUT 14
REG
H
DAC
REG
H
14
R
DAC D
VOUTD
DAC E
VOUTE
LDAC
R
R
R
R
R
R
R
14
R
DAC F
VOUTF
14
DAC G
VOUTG
14
DAC H
VOUTH
GND
VREF(+) VREF(–)
GH
GH
VREF(+) VREF(–)
CDEF CDEF
CLR
DUTGND
EF
DUTGND
GH
REV. A
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reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
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© Analog Devices, Inc., 2000