a
16-Channel, 8-Bit
Multiplying DAC
AD8600
FUNCTIONAL BLOCK DIAGRAM
FEATURES
16 Independently Addressable Voltage Outputs
Full-Scale Set by External Reference
2 µs Settling Time
Double Buffered 8-Bit Parallel Input
High Speed Data Load Rate
Data Readback
Operates from Single +5 V
Optional ±6 V Supply Extends Output Range
EN
A3
A2
A1
A0
The AD8600 contains 16 independent voltage output digital-toanalog converters that share a common external reference input
voltage. Each DAC has its own DAC register and input register
to allow double buffering. An 8-bit parallel data input, four address pins, a CS select, a LD, EN, R/W, and RS provide the
digital interface.
Data is preloaded into the input registers one at a time after the
internal address decoder selects the input register. In the write
mode (R/W low) data is latched into the input register during
the positive edge of the EN pulse. Pulses as short as 40 ns can
be used to load the data. After changes have been submitted to
the input registers, the DAC registers are simultaneously updated by a common load EN × LD strobe. The new analog output voltages simultaneously appear on all 16 outputs.
LD
VDD2
VREF
VCC
O0
O1
O2
O3
O4
O5
O6
O7
O8
O9
O10
O11
O12
O13
O14
O15
CONTROL
LOGIC
16 x 8
DAC
REGISTERS
16
8-BIT
DAC S
16 x 8
INPUT
REGISTERS
AD8600
DGND1
DGND2
DACGND
VEE
At system power up or during fault recovery the reset (RS) pin
forces all DAC registers into the zero state which places zero
volts at all DAC outputs.
The AD8600 is offered in the PLCC-44 package. The device is
designed and tested for operation over the extended industrial
temperature range of –40°C to +85°C.
R/W•CS•ADDR•EN
The AD8600 is constructed in a monolithic CBCMOS process
which optimizes use of CMOS for logic and bipolar for speed
and precision. The digital-to-analog converter design uses voltage mode operation ideally suited to single supply operation.
The internal DAC voltage range is fixed at DACGND to VREF.
The voltage buffers provide an output voltage range that approaches ground and extends to 1.0 V below VCC. Changes in
reference voltage values and digital inputs will settle within
± 1 LSB in 2 µs.
VDD1
ADDRESS
DECODE
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
APPLICATIONS
Phased Array Ultrasound & Sonar
Power Level Setting
Receiver Gain Setting
Automatic Test Equipment
LCD Clock Level Setting
GENERAL DESCRIPTION
RS
R/W
CS
VDD1
VDD2
LD•EN
VREF
VCC
DB7...DB0
INPUT
REGISTER
DAC
REGISTER
R-2R
DAC
OX
RS
DGND2
RS
DACGND
VEE
D GND1
R/W•CS•ADDRESS
Figure 1. Equivalent DAC Channel
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood. MA 02062-9106, U.S.A.
Tel: 617/329-4700
Fax: 617/326-8703
