CY2292
Three PLL General Purpose
EPROM Programmable Clock Generator
Features
Benefits
■
Three Integrated Phase Locked Loops
■
■
EPROM programmability
Generates up to three custom frequencies from external
sources
■
Factory Programmable (CY2292) or Field Programmable
(CY2292F) Device Options
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Easy customization and fast turnaround
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Programming support available for all opportunities
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Low-skew, Low-jitter, High Accuracy Outputs
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Supports low-power applications
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Power Management Options (Shutdown, OE, Suspend)
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Eight user selectable frequencies on CPU PLL
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Frequency Select Option
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Allows downstream PLLs to stay locked on CPUCLK output
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Smooth Slewing on CPUCLK
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Industry standard packaging saves on board space
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Configurable 3.3V or 5V Operation
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16-pin SOIC Package (CY2292F also in TSSOP)
Selector Guide
Part Number
Input Frequency Range
Output Frequency Range
Specifics
CY2292SC, SL, SXC, SXL
10 MHz–25 MHz (external crystal)
1 MHz–30 MHz (reference clock)
76.923 kHz–100 MHz (5V)
76.923 kHz–80 MHz (3.3V)
Factory Programmable
Commercial Temperature
CY2292SI, SXI
10 MHz–25 MHz (external crystal)
1 MHz–30 MHz (reference clock)
76.923 kHz–90 MHz (5V)
76.923 kHz–66.6 MHz (3.3V)
Factory Programmable
Industrial Temperature
CY2292F, FXC, FZX
10 MHz–25 MHz (external crystal)
1 MHz–30 MHz (reference clock)
76.923 kHz–90 MHz (5V)
76.923 kHz–66.6 MHz (3.3V)
Field Programmable
Commercial Temperature
CY2292FXI, FZXI
10 MHz–25 MHz (external crystal)
1 MHz–30 MHz (reference clock)
76.923 kHz–80 MHz (5V)
76.923 kHz–60.0 MHz (3.3V)
Field Programmable
Industrial Temperature
Logic Block Diagram
.
XTALIN
OSC.
XTALOUT
XBUF
CPLL
(8 BIT)
/1,2,4
CPUCLK
S0
CLKA
S1
S2/SUSPEND
SPLL
(8 BIT)
CLKB
/1,2,4,8
/1,2,3,4,5,6
/8,10,12,13
/20,24,26,40
/48,52,96,104
CLKC
CLKD
CONFIG
EPROM
SHUTDOWN/
OE
Cypress Semiconductor Corporation
Document #: 38-07449 Rev. *E
MUX
UPLL
(10 BIT)
•
198 Champion Court
•
San Jose, CA 95134-1709
•
408-943-2600
Revised September 10, 2009
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