86
CY7C186
8Kx8 Static RAM
Features
provided by an active LOW chip enable (CE1), an active HIGH
chip enable (CE2), and active LOW output enable (OE) and
three-state drivers. The device has an automatic power-down
feature (CE1), reducing the power consumption by over 80%
when deselected. The CY7C186 is in a 600-mil-wide PDIP
package and a 32-pin TSOP (std. pinout).
• High speed
— 20 ns
• Low active power
An active LOW write enable signal (WE) controls the writing/reading operation of the memory. When CE1 and WE inputs are both LOW and CE2 is HIGH, data on the eight data
input/output pins (I/O0 through I/O7) is written into the memory
location addressed by the address present on the address
pins (A0 through A12). Reading the device is accomplished by
selecting the device and enabling the outputs, CE1 and OE
active LOW, CE2 active HIGH, while WE remains inactive or
HIGH. Under these conditions, the contents of the location addressed by the information on address pins are present on the
eight data input/output pins.
— 605 mW
• Low standby power
— 110 mW
• CMOS for optimum speed/power
• Easy memory expansion with CE1, CE2, and OE
features
• TTL-compatible inputs and outputs
• Automatic power-down when deselected
Functional Description
The CY7C186 is a high-performance CMOS static RAM organized as 8192 words by 8 bits. Easy memory expansion is
The input/output pins remain in a high-impedance state unless
the chip is selected, outputs are enabled, and write enable
(WE) is HIGH. A die coat is used to insure alpha immunity.
Pin Configuration
LogicBlock Diagram
DIP
Top View
NC
A4
A5
A6
A7
A8
A9
A10
A11
A12
I/O0
I/O1
I/O2
GND
I/O0
I/O1
I/O2
SENSE AMPS
A1
A2
A3
A4
A5
A6
A7
A8
ROW DECODER
INPUT BUFFER
256 x 32 x 8
ARRAY
I/O3
I/O4
1
28
2
27
3
26
4
25
5
24
6
23
7
22
8
21
9
20
10
19
11
18
12
17
13
16
14
15
VCC
WE
CE 2
A3
A2
A1
OE
A0
CE 1
I/O 7
I/O 6
I/O 5
I/O 4
I/O 3
I/O5
I/O6
POWER
12
11
9
I/O7
DOWN
A
A
A
A
A
10
COLUMN DECODER
0
CE1
CE2
WE
OE
Selection Guide[1]
7C186-20
20
110
20/15
Maximum Access Time (ns)
Maximum Operating Current (mA)
Maximum Standby Current (mA)
7C186-25
25
100
20/15
7C186-35
35
100
20/15
Notes:
1. For military specifications, see the CY7C186A datasheet.
Cypress Semiconductor Corporation
Document #: 38-05280 Rev. **
•
3901 North First Street
•
San Jose
•
CA 95134 • 408-943-2600
Revised March 22, 2002