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08 Data Sheet
N O T O M M EN
DG4
EC
R
DG508A
March 4, 2009
FN3137.6
CMOS Analog Multiplexers
Features
The DG508A is a CMOS Monolithic 8-Channel Analog
Multiplexer, which can also be used as a demultiplexer. An
enable input is provided. When the enable input is high, a
channel is selected by the address inputs, and when low, all
channels are off.
• Low Power Consumption
A channel in the ON state conducts current equally well in
both directions. In the OFF state each channel blocks
voltages up to the supply rails. The address inputs and the
enable input are TTL and CMOS compatible over the full
specified operating temperature range.
• Break-Before-Make Switching
The DG508A is pinout compatible with the industry standard
devices.
• TTL and CMOS-Compatible Address and Enable Inputs
• 44V Maximum Power Supply Rating
• High Latch-Up Immunity
• Alternate Source
• Pb-Free Available (RoHS Compliant)
Applications
• Data Acquisition Systems
• Communication Systems
Ordering Information
TEMP.
RANGE (°C)
PACKAGE
DG508AAK
-55 to +125
16 Ld CERDIP
PKG.
DWG. #
DG508ABK
-25 to +85
16 Ld CERDIP
F16.3
DG508ACJ
0 to +70
16 Ld PDIP
E16.3
DG508ACJZ
(See Note)
0 to +70
16 Ld PDIP
(Pb-free)
• Signal Multiplexing/Demultiplexing
F16.3
E16.3
PART NUMBER
• Audio Signal Multiplexing
Truth Table
DG508A
A2
A1
A0
EN
ON SWITCH
X
X
X
0
None
0
0
0
1
1
0
0
1
1
2
0
1
0
1
3
0
1
1
1
4
DG508A (PDIP, CERDIP)
TOP VIEW
1
0
0
1
5
1
0
1
1
6
1
16 A1
1
1
0
1
7
EN 2
15 A2
1
1
1
1
8
NOTE: Intersil Pb-free products employ special Pb-free material
sets; molding compounds/die attach materials and 100% matte tin
plate termination finish, which is compatible with both SnPb and
Pb-free soldering operations. Intersil Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or exceed
the Pb-free requirements of IPC/JEDEC J STD-020C.
Pinout
A0
V- 3
14 GND
S1
4
13 V+
S2
5
12 S5
S3
6
11 S6
S4
7
10 S7
D 8
9 S8
1
A0 , A1 , A2 , EN
Logic “1” = VAH ≥ 2.4V, Logic “0” = VAL ≤ 0.8V
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
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