DS1231/S
DS1231/S
Power Monitor Chip
FEATURES
PIN ASSIGNMENT
• Warns processor of an impending power failure
IN
processor from destroying nonvolatile
memory during power transients
• Automatically
8
VCC
2
7
NMI
TOL
• Prevents
1
MODE
• Provides time for an orderly shutdown
3
6
RST
4
5
RST
GND
restarts processor after power is
restored
DS1231 8–Pin DIP
(300 MIL)
See Mech. Drawings
Section
• Suitable for linear or switching power supplies
• Adjusts to hold time of the power supply
NC
1
16
NC
IN
• Supplies necessary signals for processor interface
2
15
VCC
3
14
13
NC
12
NC
RST
NC
NC
MODE
• Accurate 5% or 10% VCC monitoring
• Replaces power-up reset circuitry
NC
4
5
TOL
6
• No external capacitors required
NC
GND
7
11
10
8
9
• Optional 16-pin SOIC surface mount package
NMI
RST
DS1231S 16–Pin SOIC
(300 MIL)
See Mech. Drawings
Section
PIN DESCRIPTION
IN
MODE
TOL
GND
RST
RST
NMI
VCC
NC
–
–
–
–
–
–
–
–
–
Input
Selects input pin characteristics
Selects 5% or 10% VCC detect
Ground
Reset (Active High)
Reset (Active Low, open drain)
Non–Maskable Interrupt
+5V Supply
No Connections
DESCRIPTION
The DS1231 Power Monitor Chip uses a precise temperature-compensated reference circuit which provides
an orderly shutdown and an automatic restart of a processor-based system. A signal warning of an impending
power failure is generated well before regulated DC
voltages go out of specification by monitoring high voltage inputs to the power supply regulators. If line isolation is required a UL-approved opto-isolator can be directly interfaced to the DS1231. The time for processor
shutdown is directly proportional to the available
hold-up time of the power supply. Just before the
hold-up time is exhausted, the Power Monitor unconditionally halts the processor to prevent spurious cycles
by enabling Reset as VCC falls below a selectable 5 or
10 percent threshold. When power returns, the processor is held inactive until well after power conditions have
stabilized, safeguarding any nonvolatile memory in the
system from inadvertent data changes.
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