SN54F38, SN74F38
QUADRUPLE 2-INPUT POSITIVE-NAND BUFFERS
WITH OPEN-COLLECTOR OUTPUTS
SDFS013A – MARCH 1987 – REVISED OCTOBER 1993
•
SN54F38 . . . J PACKAGE
SN74F38 . . . D OR N PACKAGE
(TOP VIEW)
Package Options Include Plastic
Small-Outline Packages, Ceramic Chip
Carriers, and Standard Plastic and Ceramic
300-mil DIPs
1A
1B
1Y
2A
2B
2Y
GND
description
These devices contain four independent 2-input
NAND buffer gates with open-collector outputs.
They perform the Boolean functions Y = A • B or
Y = A + B in positive logic.
The open-collector outputs require pullup
resistors to perform correctly. They may be
connected to other open-collector outputs to
implement active-low wired-OR or active-high
wired-AND functions. Open-collector devices are
often used to generate higher VOH levels.
OUTPUT
Y
H
H
X
L
1B
2A
2B
3A
3B
4A
4B
1
10
6
9
7
8
4
3 2 1 20 19
18
5
17
6
16
7
15
8
14
9 10 11 12 13
4A
NC
4Y
NC
3B
H
NC – No internal connection
logic symbol†
1A
11
5
H
X
12
4
L
L
3
VCC
4B
4A
4Y
3B
3A
3Y
2Y
GND
NC
3Y
3A
B
13
1B
1A
NC
VCC
4B
1Y
NC
2A
NC
2B
FUNCTION TABLE
(each gate)
INPUTS
14
2
SN54F38 . . . FK PACKAGE
(TOP VIEW)
The SN54F38 is characterized for operation over
the full military temperature range of – 55°C to
125°C. The SN74F38 is characterized for
operation from 0°C to 70°C.
A
1
logic diagram (positive logic)
&
3
2
4
1Y
1B
6
5
2Y
8
3Y
3A
3B
12
13
2A
2B
9
10
1A
11
4Y
4A
4B
1
2
3
1Y
4
5
6
2Y
9
10
8
3Y
12
13
11
4Y
† This symbol is in accordance with ANSI/IEEE Std 91-1984 and
IEC Publication 617-12.
Pin numbers shown are for the D, J, and N packages.
Copyright © 1993, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
2–1
