Revised September 2000
74F00
Quad 2-Input NAND Gate
General Description
This device contains four independent gates, each of which
performs the logic NAND function.
Ordering Code:
Order Number
Package Number
Package Description
74F00SC
M14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow
74F00SJ
M14D
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74F00PC
N14A
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
Connection Diagram
IEEE/IEC
Unit Loading/Fan Out
U.L.
Pin Names
Input IIH/IIL
Description
HIGH/LOW
Output IOH/IOL
An , Bn
Inputs
1.0/1.0
20 µA/−0.6 mA
On
Outputs
50/33.3
−1 mA/20 mA
© 2000 Fairchild Semiconductor Corporation
DS009454
www.fairchildsemi.com
74F00 Quad 2-Input NAND Gate
December 1994
