CMOS Static RAM
256K (64K x 4-Bit)
IDT61298SA/TTSA
Features
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64K x 4 high-speed static RAM
Fast Output Enable (OE) pin available for added system
flexibility
High speed (equal access and cycle times)
– Commercial: 12/15 ns (max.)
JEDEC standard pinout
300 mil 28-pin SOJ
Produced with advanced CMOS technology
Bidirectional data inputs and outputs
Inputs/Outputs TTL-compatible
Three-state outputs
Military product compliant to MIL-STD-883, Class B
CMOS technology. This state-of-the-art technology, combined with innovative circuit design techniques, provides a cost-effective approach for
memory intensive applications.
The IDT61298SA features two memory control functions: Chip Select
(CS) and Output Enable (OE). These two functions greatly enhance the
IDT61298SA's overall flexibility in high-speed memory applications.
Access times as fast as 12ns are available. The IDT61298SA offers
a reduced power standby mode, ISB1, which enables the designer to
considerably reduce device power requirements. This capability significantly decreases system power and cooling levels, while greatly enhancing system reliability.
All inputs and outputs are TTL-compatible and the device operates from
a single 5V supply. Fully static asynchronous circuitry, along with matching
access and cycle times, favor the simplified system design approach.
The IDT61298SA is packaged in a 300 mil, 28-pin SOJ, providing
improved board-level packing densities.
Description
The lDT61298SA is a 262,144-bit high-speed static RAM organized
as 64K x 4. It is fabricated using IDT’s high-performance, high-reliability
Functional Block Diagram
A0
VCC
GND
D
E
C
O
D
E
R
262,144-BIT
MEMORY ARRAY
A15
I/O0
I/O1
I/O2
I/O CONTROL
INPUT
DATA
CONTROL
I/O3
,
CS
WE
OE
2971 drw 01
FEBRUARY 2007
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©2007 Integrated Device Technology, Inc.
DSC-2971/09