IDT71V416S
IDT71V416L
3.3V CMOS Static RAM
4 Meg (256K x 16-Bit)
Description
Features
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The IDT71V416 is a 4,194,304-bit high-speed Static RAM organized
as 256K x 16. It is fabricated using IDT’s high-perfomance, high-reliability
CMOS technology. This state-of-the-art technology, combined with innovative circuit design techniques, provides a cost-effective solution for highspeed memory needs.
The IDT71V416 has an output enable pin which operates as fast as
5ns, with address access times as fast as 10ns. All bidirectional inputs and
outputs of the IDT71V416 are LVTTL-compatible and operation is from a
single 3.3V supply. Fully static asynchronous circuitry is used, requiring
no clocks or refresh for operation.
The IDT71V416 is packaged in a 44-pin, 400 mil Plastic SOJ and a
44-pin, 400 mil TSOP Type II package and a 48 ball grid array, 9mm x
9mm package.
256K x 16 advanced high-speed CMOS Static RAM
JEDEC Center Power / GND pinout for reduced noise.
Equal access and cycle times
– Commercial and Industrial: 10/12/15ns
One Chip Select plus one Output Enable pin
Bidirectional data inputs and outputs directly
LVTTL-compatible
Low power consumption via chip deselect
Upper and Lower Byte Enable Pins
Single 3.3V power supply
Available in 44-pin, 400 mil plastic SOJ package and a 44pin, 400 mil TSOP Type II package and a 48 ball grid array,
9mm x 9mm package.
Functional Block Diagram
OE
Output
Enable
Buffer
A0 - A17
Address
Buffers
Row / Column
Decoders
8
CS
Chip
Select
Buffer
8
4,194,304-bit
Memory
Array
WE
16
Write
Enable
Buffer
Sense
Amps
and
Write
Drivers
8
8
High
Byte
Output
Buffer
High
Byte
Write
Buffer
Low
Byte
Output
Buffer
Low
Byte
Write
Buffer
8
I/O 15
8
I/O 8
8
I/O 7
8
I/O 0
BHE
Byte
Enable
Buffers
BLE
3624 drw 01
OCTOBER 2003
1
©2003 Integrated Device Technology, Inc.
DSC-3624/08
