IDT74FCT823AT/BT/CT/DT
HIGH-PERFORMANCE CMOS BUS INTERFACE REGISTER
INDUSTRIAL TEMPERATURE RANGE
HIGH-PERFORMANCE
CMOS BUS
INTERFACE REGISTER
IDT74FCT823AT/BT/CT/DT
FEATURES:
DESCRIPTION:
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The FCT823T series is built using an advanced dual metal CMOS
technology. The FCT823T series bus interface registers are designed to
eliminate the extra packages required to buffer existing registers and
provide extra data width for wider address/data paths or buses carrying
parity. The FCT823T are 9-bit wide buffered registers with Clock Enable
(EN) and Clear (CLR) – ideal for parity bus interfacing in high-performance
microprogrammed systems.
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Low input and output leakage ≤1µ A (max.)
CMOS power levels
True TTL input and output compatibility
• VOH = 3.3V (typ.)
• VOL = 0.3V (typ.)
Meets or exceeds JEDEC standard 18 specifications
Available in SOIC, SSOP, and QSOP packages
A, B, C and D speed grades
High drive outputs (-15mA IOH, 48mA IOL)
Power off disable outputs permit “live insertion”
The FCT823T high-performance interface family can drive large capacitive loads, while providing low-capacitance bus loading at both inputs and
outputs. All inputs have clamp diodes and all outputs are designed for lowcapacitance bus loading in high-impedance state.
FUNCTIONAL BLOCK DIAGRAM
D0
DN
EN
CLR
D
CL
Q
D
CP Q
CL
Q
CP Q
CP
OE
Y0
INDUSTRIAL TEMPERATURE RANGE
YN
AUGUST 2000
1
c
1999 Integrated Device Technology, Inc.
DSC-5487/-
