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M28C64-30W6
M28C64 64 Kbit (8K x 8) Parallel EEPROM With Software Data Protection s Fast Access Time: – 90 ns at VCC=5 V for M28C64 and M28C64-A – 120 ns at VCC=3 V for M28C64-xxW s Single Supply Voltage: – 4.5 V to 5.5 V for M28C64 and M28C64-A – 2.7 V to 3.6 V for M28C64-xxW s Low Power Consumption s Fast BYTE and PAGE WRITE (up to 64 Bytes) 28 – 1 ms at VCC=4.5 V for M28C64-A 1 PLCC32 (KA) PDIP28 (BS) – 3 ms at VCC=4.5 V for M28C64 – 5 ms at VCC=2.7 V for M28C64-xxW s Enhanced Write Detection and Monitoring: – Ready/Busy Open Drain Output 28 – Data Polling 1 – Toggle Bit – Page Load Timer Status s JEDEC Approved Bytewide Pin-Out s 100000 Erase/Write Cycles (minimum) s TSOP28 (NS) 8 x 13.4 mm Software Data Protection s SO28 (MS) 300 mil width Data Retention (minimum): – 40 Years for M28C64 and M28C64-xxW – 10 Years for M28C64-A Figure 1. Logic Diagram VCC Table 1. Signal Names 13 A0-A12 Address Input DQ0-DQ7 Data Input / Output W Write Enable W E Chip Enable E G Output Enable G RB Ready / Busy VCC Supply Voltage VSS Ground 8 A0-A12 DQ0-DQ7 M28C64 RB June 2000 VSS AI01350C 1/24
STM
STMicroelectronics NV
スイス
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