SN54LV174A, SN74LV174A
HEX D-TYPE FLIP-FLOPS
WITH CLEAR
SCLS401C – APRIL 1998 – REVISED MAY 2000
D
D
D
D
D
D
D
EPIC ™ (Enhanced-Performance Implanted
CMOS) Process
Typical VOLP (Output Ground Bounce)
<0.8 V at VCC = 3.3 V, TA = 25°C
Typical VOHV (Output VOH Undershoot)
>2.3 V at VCC = 3.3 V, TA = 25°C
2-V to 5.5-V VCC Operation
Support Mixed-Mode Voltage Operation on
All Ports
Latch-Up Performance Exceeds 250 mA
Per JESD 17
ESD Protection Exceeds 2000 V Per
MIL-STD-883, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0)
Package Options Include Plastic
Small-Outline (D, NS), Shrink Small-Outline
(DB), Thin Very Small-Outline (DGV), and
Thin Shrink Small-Outline (PW) Packages,
Ceramic Flat (W) Packages, Chip Carriers
(FK), and DIPs (J)
SN54LV174A . . . J OR W PACKAGE
SN74LV174A . . . D, DB, DGV, NS, OR PW PACKAGE
(TOP VIEW)
CLR
1Q
1D
2D
2Q
3D
3Q
GND
1
16
2
15
3
14
4
13
5
12
6
11
7
10
8
9
VCC
6Q
6D
5D
5Q
4D
4Q
CLK
SN54LV174A . . . FK PACKAGE
(TOP VIEW)
1Q
CLR
NC
VCC
6Q
D
3
1D
2D
NC
2Q
3D
description
2 1 20 19
18
5
17
6
16
7
15
8
14
9 10 11 12 13
6D
5D
NC
5Q
4D
3Q
GND
NC
CLK
4Q
The ’LV174A devices are hex D-type flip-flops
designed for 2-V to 5.5-V VCC operation.
4
These devices are monolithic positive-edgeNC – No internal connection
triggered flip-flops with a direct clear (CLR) input.
Information at the data (D) inputs meeting the
setup time requirements is transferred to the outputs on the positive-going edge of the clock pulse. Clock
triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going
edge of the clock pulse. When the clock (CLK) input is at either the high or low level, the D-input signal has no
effect at the output.
The SN54LV174A is characterized for operation over the full military temperature range of –55°C to 125°C.
The SN74LV174A is characterized for operation from –40°C to 85°C.
FUNCTION TABLE
INPUTS
CLR
CLK
D
OUTPUT
Q
L
X
X
L
H
↑
H
H
H
↑
L
L
H
L
X
Q0
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC is a trademark of Texas Instruments.
Copyright © 2000, Texas Instruments Incorporated
UNLESS OTHERWISE NOTED this document contains PRODUCTION
DATA information current as of publication date. Products conform to
specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all
parameters.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
