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部品型式

MPC948FA

製品説明
仕様・特性

MOTOROLA SEMICONDUCTOR TECHNICAL DATA Low Voltage 1:12 Clock Distribution Chip The MPC948 is a 1:12 low voltage clock distribution chip. The device features the capability to select either a differential LVPECL or a LVTTL compatible input. The 12 outputs are LVCMOS or LVTTL compatible and feature the drive strength to drive 50Ω series terminated transmission lines. With output–to–output skews of 350ps, the MPC948 is ideal as a clock distribution chip for the most demanding of synchronous systems. For a similar product targeted at a lower price/performance point, please consult the MPC947 data sheet. • • • • • • • • • Order this document by MPC948/D MPC948 LOW VOLTAGE 1:12 CLOCK DISTRIBUTION CHIP Clock Distribution for PowerPC 620 L2 Cache LVPECL or LVCMOS/LVTTL Clock Input 350ps Maximum Output–to–Output Skew Drives Up to 24 Independent Clock Lines Maximum Output Frequency of 150MHz Synchronous Output Enable Tristatable Outputs 32–Lead LQFP Packaging 3.3V VCC Supply Voltage FA SUFFIX 32–LEAD LQFP PACKAGE CASE 873A With an output impedance of approximately 7Ω, in both the HIGH and LOW logic states, the output buffers of the MPC948 are ideal for driving series terminated transmission lines. More specifically, each of the 12 MPC948 outputs can drive two series terminated 50Ω transmission lines. With this capability, the MPC948 has an effective fanout of 1:24 in applications where each line drives a single load. With this level of fanout, the MPC948 provides enough copies of low skew clocks for high performance synchronous systems, including use as a clock distribution chip for the L2 cache of a PowerPC 620 based system. The differential LVPECL inputs of the MPC948 allow the device to interface directly with a LVPECL fanout buffer like the MC100LVE111 to build very wide clock fanout trees or to couple to a high frequency clock source. The LVCMOS/LVTTL input provides a more standard interface for applications requiring only a single clock distribution chip at relatively low frequencies. In addition, the two clock sources can be used to provide for a test clock interface as well as the primary system clock. A logic HIGH on the TTL_CLK_Sel pin will select the TTL level clock input. All of the control inputs are LVCMOS/LVTTL compatible. The MPC948 provides a synchronous output enable control to allow for starting and stopping of the output clocks. A logic high on the Sync_OE pin will enable all of the outputs. Because this control is synchronized to the input clock, potential output glitching or runt pulse generation is eliminated. In addition, for board level test, the outputs can be tristated via the tristate control pin. A logic LOW applied to the Tristate input will force all of the outputs into high impedance. Note that all of the MPC948 inputs have internal pullup resistors. The MPC948 is fully 3.3V compatible. The 32–lead LQFP package was chosen to optimize performance, board space and cost of the device. The 32–lead LQFP has a 7x7mm body size with a conservative 0.8mm pin spacing. PowerPC is a trademark of International Business Machines Corporation. MOTOROLA ADVANCED CLOCK DRIVERS DEVICE DATA 615 6

ブランド

MOT

現況

1999年8月4日、ディスクリート・標準アナログ・標準ロジックなどの半導体部門をオン・セミコンダクターとして分社化した。これは、イリジウムコミュニケーションズ倒産の損失をカバーするために分社化された。

会社名

ON Semiconductor

本社国名

U.S.A

事業概要

オン・セミコンダクターの前身は、モトローラ社の半導体コンポーネント・グループであり、モトローラ社のディスクリート、標準アナログ、標準ロジック・デバイスを継続して製造。

供給状況

 
Not pic File
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