64Mb: x4, x8, x16
SDRAM
SYNCHRONOUS
DRAM
MT48LC16M4A2 - 4 Meg x 4 x 4 banks
MT48LC8M8A2 - 2 Meg x 8 x 4 banks
MT48LC4M16A2 - 1 Meg x 16 x 4 banks
For the latest data sheet, please refer to the Micron Web
site: www.micron.com/mti/msp/html/datasheet.html
FEATURES
PIN ASSIGNMENT (Top View)
• PC66-, PC100- and PC133-compliant
• 143 MHz, graphical 4 Meg x 16 option
• Fully synchronous; all signals registered on positive
edge of system clock
• Internal pipelined operation; column address can
be changed every clock cycle
• Internal banks for hiding row access/precharge
• Programmable burst lengths: 1, 2, 4, 8 or full page
• Auto Precharge, includes CONCURRENT AUTO
PRECHARGE, and Auto Refresh Modes
• Self Refresh Modes: standard and low power
• 64ms, 4,096-cycle refresh
• LVTTL-compatible inputs and outputs
• Single +3.3V ±0.3V power supply
OPTIONS
54-Pin TSOP
x4 x8 x16
NC
DQ0
NC
NC
NC
DQ1
NC
NC
-
MARKING
• Configurations
16 Meg x 4 (4 Meg x 4 x 4 banks)
8 Meg x 8 (2 Meg x 8 x 4 banks)
4 Meg x 16 (1 Meg x 16 x 4 banks)
16M4
8M8
4M16
• WRITE Recovery (tWR)
t
WR = “2 CLK”1
A2
• Plastic Package - OCPL2
54-pin TSOP II (400 mil)
-
VDD
DQ0
- VDDQ
NC DQ1
DQ1 DQ2
- VssQ
NC DQ3
DQ2 DQ4
- VDDQ
NC DQ5
DQ3 DQ6
- VssQ
NC DQ7
VDD
NC DQML
- WE#
- CAS#
- RAS#
CS#
BA0
BA1
A10
A0
A1
A2
A3
VDD
-
NC DQ0
TG
• Timing (Cycle Time)
10ns @ CL2 (PC100)
7.5ns @ CL3 (PC133)
7.5ns @ CL2 (PC133)
7ns @ CL3 (143 MHz)
Column Addressing
None
IT4
NC
NC
DQ3
NC
NC
NC
DQ2
NC
DQM
-
8 Meg x 8
2 Meg x 8 x 4 banks
4K
4K (A0-A11)
4 (BA0, BA1)
4 Meg x 16
1 Meg x 16 x 4 banks
4K
4K (A0-A11)
4 (BA0, BA1)
1K (A0-A9)
512 (A0-A8)
256 (A0-A7)
SPEED
GRADE
Refer to Micron Technical Note TN-48-05.
Off-center parting line.
Available on 4 Meg x 16.
Available on x8, x16, -8E.
CLOCK
FREQUENCY
-7G
-7E
-75
-8E
-7E
-75
-8E
Part Number Example:
64Mb: x4, x8, x16 SDRAM
64MSDRAM.p65 – Rev. 11/99
-
KEY TIMING PARAMETERS
MT48LC8M8A2TG-8E
NOTE: 1.
2.
3.
4.
Vss
DQ15 DQ7
VssQ DQ14 NC
DQ13 DQ6
VDDQ DQ12 NC
DQ11 DQ5
VssQ DQ10 NC
DQ9 DQ4
VDDQ DQ8 NC
Vss
NC
DQMH DQM
CLK
CKE
NC
A11
A9
A8
A7
A6
A5
A4
Vss
-
16 Meg x 4
4 Meg x 4 x 4 banks
4K
4K (A0-A11)
4 (BA0, BA1)
Configuration
Refresh Count
Row Addressing
Bank Addressing
None
L
• Operating Temperature Range
Commercial (0°C to +70°C)
Extended (-40°C to +85°C)
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
Note: The # symbol indicates signal is active LOW. A dash (–)
indicates x8 and x4 pin function is same as x16 pin function.
-8E
-75
-7E
-7G3
• Self Refresh
Standard
Low Power
x16 x8 x4
143 MHz
143 MHz
133 MHz
125 MHz
133 MHz
100 MHz
100 MHz
ACCESS TIME SETUP
CL = 2* CL = 3* TIME
–
–
–
–
5.4ns
6ns
6ns
6ns
5.4ns
5.4ns
6ns
–
–
–
2ns
1.5ns
1.5ns
2ns
1.5ns
1.5ns
2ns
HOLD
TIME
1ns
0.8ns
0.8ns
1ns
0.8ns
0.8ns
1ns
* CL = CAS (READ) latency
1
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©1999, Micron Technology, Inc.
