SN55115, SN75115
DUAL DIFFERENTIAL RECEIVERS
SLLS072D – SEPTEMBER 1973 – REVISED MAY 1998
D
D
D
D
D
D
D
D
D
D
SN55115 . . . J OR W PACKAGE
SN75115 . . . N PACKAGE
(TOP VIEW)
Choice of Open-Collector or Active Pullup
(Totem-Pole) Outputs
Single 5-V Supply
Differential Line Operation
Dual-Channel Operation
TTL Compatible
± 15-V Common-Mode Input Voltage Range
Optional-Use Built-In 130-Ω LineTerminating Resistor
Individual Frequency-Response Controls
Individual Channel Strobes
Designed for Use With SN55113, SN75113,
SN55114, and SN75114 Drivers
Designed to Be Interchangeable With
National DS9615 Line Receivers
1YS
1YP
1STRB
1RTC
1B
1RT
1A
GND
1
15
3
14
4
13
5
VCC
2YS
2YP
2STRB
2RTC
2B
2RT
2A
16
2
12
6
11
7
10
8
9
SN55114 . . . FK PACKAGE
(TOP VIEW)
1YP
1YS
NC
VCC
2YS
D
description
1STRB
1RTC
NC
1B
1RT
3 2 1 20 19
18
5
17
6
16
7
15
8
14
9 10 11 12 13
2YP
2STRB
NC
2RTC
2B
1A
GND
NC
2A
2RT
The SN55115 and SN75115 dual differential line
receivers are designed to sense small differential
signals in the presence of large common-mode
noise. These devices give TTL-compatible output
signals as a function of the differential input
voltage. The open-collector output configuration
permits the wire-ANDing of similar TTL outputs
(such
as
SN5401/SN7401)
or
other
SN55115/SN75115 line receivers. This permits a
level of logic to be implemented without extra
delay.
4
NC – No internal connection
The output stages are similar to TTL totem-pole outputs, but with sink outputs, 1YS and 2YS, and the
corresponding active pullup terminals, 1YP and 2YP, available on adjacent package pins. The frequency
response and noise immunity may be provided by a single external capacitor. A strobe input is provided for each
channel. With the strobe in the low level, the receiver is disabled and the outputs are forced to a high level.
The SN55115 is characterized for operation over the full military temperature range of – 55°C to 125°C. The
SN75115 is characterized for operation from 0°C to 70°C.
FUNCTION TABLE
STRB
DIFF INPUT
(A AND B)
OUTPUT
(YP AND YS
TIED
TOGETHER)
L
X
H
H
L
H
H
H
L
H = VI ≥ VIH min or VID more positive than VT + max
L = VI ≤ VIL max or VID more negative thanVT – max
X = irrelevant
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright © 1998, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
