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MT8986AL619799
CMOS ST-BUSTM Family MT8986 Multiple Rate Digital Switch Data Sheet Features September 2011 • 256 x 256 or 512 x 256 switching configurations • 8-bit or 4-bit channel switching capability • Guarantees frame integrity for wideband channels • Automatic identification of ST-BUS/GCI interfaces • Accepts serial streams with data rates up to 8.192 Mb/s • Rate conversion from 2.048 Mb/s to 4.096 or 8.192 Mb/s and vice-versa • Programmable frame offset on inputs • Per-channel three-state control • Per-channel message mode • Control interface compatible to Intel/Motorola CPUs • Low power consumption Ordering Information MT8986AP1 MT8986APR1 MT8986AL1 MT8986AE1 * * * * * * * 44 Pin only Tubes Tape & Reel Trays Tubes Description The Multiple Rate Digital Switch (MRDX) is an upgraded version of Zarlink's MT8980D Digital Switch (DX). It is pin compatible with the MT8980D and retains all of its functionality. This device is designed to provide simultaneous connections (non-blocking) for up to 256 64 kb/s channels or blocking connections for up to 512 64 kb/s channels. The serial inputs and outputs connected to MT8986 may have 32 to 128 64 kb/s channels per frame with data rates ranging from 2048 up to 8192 kb/s. The MT8986 provides perchannel selection between variable and constant throughput delays allowing voice and grouped data channels to be switched without corrupting the data sequence integrity. In addition, the MT8986 can be used for switching of 32 kb/s channels in ADPCM applications. The MT8986 is ideal for medium size mixed voice and data switching/processing applications. VDD VSS ODE Output MUX Multiple Buffer Data Memory Serial to Parallel Converter PLCC* PLCC* MQFP* PDIP* -40C to +85C Medium size digital switch matrices Hyperchannel switching (e.g., ISDN H0) MVIP ™ interface functions Serial bus control and monitoring Centralized voice processing systems Voice/Data multiplexer 32 kbit/s channel switching STi0 STi1 STi2 STi3 STi4 STi5 STi6 STi7 STi8 STi9 STi10 STi11 STi12 STi13 STi14 STi15 Pin Pin Pin Pin *Pb Free Matte Tin Applications • • • • • • • 44 44 44 40 Parallel to Serial Converter Internal Registers Timing Unit STo0 STo1 Connection Memory Microprocessor Interface CLK FR AS/ IM ALE * DS CS RD R/W A0/ DTA AD7/ AD0 WR A7 STo2 STo3 STo4 STo5 STo6 STo7 STo8 * STo9 * CSTo Figure 1 - Functional Block Diagram 1 Zarlink Semiconductor Inc. Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc. Copyright 1997-2011, Zarlink Semiconductor Inc. All Rights Reserved.
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