PCA9542A
2-channel I2C-bus multiplexer and interrupt logic
Rev. 5.1 — 15 July 2015
Product data sheet
1. General description
The PCA9542A is a 1-of-2 bidirectional translating multiplexer, controlled via the I2C-bus.
The SCL/SDA upstream pair fans out to two SCx/SDx downstream pairs, or channels.
Only one SCx/SDx channel is selected at a time, determined by the contents of the
programmable control register. Two interrupt inputs, INT0 and INT1, one for each of the
SCx/SDx downstream pairs, are provided. One interrupt output, INT, which acts as an
AND of the two interrupt inputs, is provided.
A power-on reset function puts the registers in their default state and initializes the I2C-bus
state machine with no channels selected.
The pass gates of the multiplexer are constructed such that the VDD pin can be used to
limit the maximum high voltage which will be passed by the PCA9542A. This allows the
use of different bus voltages on each SCx/SDx pair, so that 1.8 V, 2.5 V, or 3.3 V parts can
communicate with 5 V parts without any additional protection. External pull-up resistors
pull the bus up to the desired voltage level for each channel. All I/O pins are 5 V tolerant.
2. Features and benefits
1-of-2 bidirectional translating multiplexer
I2C-bus interface logic; compatible with SMBus
2 active LOW interrupt inputs (INT0, INT1)
Active LOW interrupt output (INT)
3 address pins allowing up to 8 devices on the I2C-bus
Channel selection via I2C-bus
Powers up with all multiplexer channels deselected
Low Ron switches
Allows voltage level translation between 1.8 V, 2.5 V, 3.3 V and 5 V buses
No glitch on power-up
Supports hot insertion
Low standby current
Operating power supply voltage range of 2.3 V to 5.5 V
5 V tolerant inputs
0 Hz to 400 kHz clock frequency
ESD protection exceeds 2000 V HBM per JESD22-A114 and 1000 V CDM per
JESD22-C101
Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA
Packages offered: SO14, TSSOP14
